US5343070A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Mesa type PIN diode
Assignee: MACOM Technology Solutions Holdings Inc
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Filing: 1993-08-02
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Granted: 1994-08-30
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Expires: 2013-08-02
Abstract
Abstract A mesa-type PIN diode and method for making same are disclosed. A diode made according to the present invention includes a junction formed in the top surface of the mesa-shaped structure, having an area that is less than (and preferrably, approximately half) the area of the top surface. A highly-doped, N-type conducting layer is formed in the side-walls of the mesa-shaped structure. The resulting diode is subject to greatly reduced charge carrier recombination effects and suffers from much less carrier-to-carrier scattering than conventional diodes. Thus, a diode made according to the present invention is capable of achieving much higher stored charge, lower resistance, lower capacitance, better switching characteristics, and lower power consumption than one made according to the prior art. Particular utility is found, inter alia, in the areas of high-frequency microwave and monolithic circuits.
Inventors
- 👤 Joel L. Goodrich
- 👤 Christopher C. Souchuns
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 18:45
CPC Classifications
H; H10; H10D; H10D8/00; H10D8/01; H10D8/021; H10D8/024; H10D84/00; H10D84/201; H10D84/204; H10W; H10W72/00; H10W72/30; H10W74/00; H10W74/01; H10W70/00; H10W70/099; H10W70/60; H10W72/071; H10W72/073; H10W72/07331; H10W72/07336; H10W72/851; H10W72/874
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
148 words
A semiconductor PIN diode made by the steps of: a. forming an insulating layer on an intrinsic layer disposed upon an N-type substrate; b. forming in said insulating layer an opening to a first region of said intrinsic layer; c. forming in said first region a P-type junction of predetermined area; d. forming upon said insulating layer and said junction a dielectric layer; e. forming a dielectric pad region by removing both said dielectric layer and said insulating layer except in a second region located on and surrounding said junction, said second region having an area which is greater than said predetermined area of said junction; f. removing said dielectric layer from said second region; g. forming a mesa having side-walls and a top surface in said intrinsic layer beneath said pad region; and h. forming an N-type, highly doped conducting layer in said side-walls of said mesa.
Claim 2
Dependent Claim
148 words
A semiconductor PIN diode made by the steps of: a. forming an insulating layer on an intrinsic layer disposed upon an N-type substrate; b. forming in said insulating layer an opening to a first region of said intrinsic layer; c. forming in said first region a P-type junction of predetermined area; d. forming upon said insulating layer and said junction a dielectric layer; e. forming a dielectric pad region by removing both said dielectric layer and said insulating layer except in a second region located on and surrounding said junction, said second region having an area which is greater than said predetermined area of said junction; f. removing said dielectric layer from said second region; g. forming a mesa having side-walls and a top surface in said intrinsic layer beneath said pad region; and h. forming an N-type, highly doped conducting layer in said side-walls of said mesa.
Claim 3
Dependent Claim
42 words
A semiconductor PIN diode made according to claim 1 wherein said conducting layer is extended onto the top surface of said mesa not occupied by said junction to form an electrical contact from said substrate to the top surface of said diode.
Claim 4
Dependent Claim
18 words
A semiconductor PIN diode made according to claim 1 wherein said diode is annealed with a forming gas.
Claim 5
Dependent Claim
70 words
A semiconductor PIN diode, and comprising: a substrate having an N-type conductivity; b. an intrinsic material mesa-shaped structure disposed upon said substrate and having a top surface and side-walls; c. a junction formed in said top surface of said mesa-shaped structure and having an area that is less than the area of said top surface; and d. a highly-doped, N-type conducting layer formed in said side-walls of said mesa-shaped structure.
Claim 6
Dependent Claim
70 words
A semiconductor PIN diode, and comprising: a substrate having an N-type conductivity; b. an intrinsic material mesa-shaped structure disposed upon said substrate and having a top surface and side-walls; c. a junction formed in said top surface of said mesa-shaped structure and having an area that is less than the area of said top surface; and d. a highly-doped, N-type conducting layer formed in said side-walls of said mesa-shaped structure.
Claim 7
Dependent Claim
14 words
A diode according to claim 4, wherein said conducting layer is doped with phosphorous.
Claim 8
Dependent Claim
38 words
A diode according to claim 4, wherein said conducting layer extends onto the top surface of said mesa not occupied by said junction to form an electrical contact from said substrate to the top surface of said diode.
Claim 9
Dependent Claim
118 words
A semiconductor PIN diode, and comprising: a. an N-type silicon substrate; b. an intrinsic material mesa-shaped structure epitaxially disposed upon said substrate and including a top surface and side-walls; c. a P-type junction formed in said top surface of said mesa-shaped structure and having an area that is approximately half the area of said top surface; d. a SiO 2 insulating layer disposed upon said top surface without covering said junction; and e. an N-type, phosphorous-doped silicon conducting layer formed in said side-walls of said mesa-shaped structure, said conducting layer extending onto the top surface of said mesa not occupied by said junction to form an electrical contact from said substrate to the top surface of said diode.
Claim 10
Dependent Claim
118 words
A semiconductor PIN diode, and comprising: a. an N-type silicon substrate; b. an intrinsic material mesa-shaped structure epitaxially disposed upon said substrate and including a top surface and side-walls; c. a P-type junction formed in said top surface of said mesa-shaped structure and having an area that is approximately half the area of said top surface; d. a SiO 2 insulating layer disposed upon said top surface without covering said junction; and e. an N-type, phosphorous-doped silicon conducting layer formed in said side-walls of said mesa-shaped structure, said conducting layer extending onto the top surface of said mesa not occupied by said junction to form an electrical contact from said substrate to the top surface of said diode.
Claim 11
Dependent Claim
15 words
A diode according to claim 4, and further comprising, an insulative material encapsulating said diode.
Claim 12
Dependent Claim
13 words
A diode according to claim 8, wherein said insulative material is a glass.
Claim 13
Dependent Claim
32 words
A diode according to claim 8, wherein said insulative material is finished to substantial planarity so as to provide at least one substantially smooth surface suitable for forming additional circuit elements therein.
Claim 14
Dependent Claim
28 words
A diode according to claim 7, and further comprising, an integrated back side capacitor formed on the side of said substrate not having said mesa-shaped structure disposed thereon.
Claim 15
Dependent Claim
22 words
A diode according to claim 11, wherein said capacitor comprises an electrically insulating layer sandwiched between said substrate and another conducting layer.
Claim 16
Dependent Claim
21 words
A diode according to claim 4, wherein the area of said top surface is approximately twice the area of said junction.
Claim 17
Dependent Claim
30 words
A diode according to claim 4, wherein said diode has a gap dimension between said sidewalls and said junction that is approximately twice the thickness of said intrinsic material structure.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-29 | 1998-02-28 | 1998-08-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-29 | 2002-02-28 | 2002-08-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-29 | 2006-02-28 | 2006-08-30 | $7700.00 | Window Closed / Lapsed |