Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
130 words
A method for reducing the clock frequency necessary to route data through a self-routing packet switching network at a given bandwidth, said given bandwidth determining a clock rate at which the data to be routed enters and the routed data exits said self-routing packet switching network, said method comprising the steps of: distributing the data to be routed among a plurality of channels; transporting said distributed data through each of said plurality of transport channels at a reduced clock rate substantially equal to said entering and exiting clock rate divided by the number of said plurality of transport channels; routing said distributed data through a self-routing fabric at said reduced clock rate; and reassembling said routed data at the output of said network at said entering and exiting clock rate.
Claim 2
Independent Claim
130 words
A method for reducing the clock frequency necessary to route data through a self-routing packet switching network at a given bandwidth, said given bandwidth determining a clock rate at which the data to be routed enters and the routed data exits said self-routing packet switching network, said method comprising the steps of: distributing the data to be routed among a plurality of channels; transporting said distributed data through each of said plurality of transport channels at a reduced clock rate substantially equal to said entering and exiting clock rate divided by the number of said plurality of transport channels; routing said distributed data through a self-routing fabric at said reduced clock rate; and reassembling said routed data at the output of said network at said entering and exiting clock rate.
Claim 3
Dependent Claim
63 words
The method as recited in claim 1, wherein said self-routing fabric further comprises a self-routing network circuit and wherein the data to be routed is organized into packets, each of said packets comprising a header portion and a data portion, and wherein said transporting step further comprises the step of transmitting said header portion of said data packets to said self-routing network circuit.
Claim 4
Dependent Claim
72 words
The method as recited in claim 2, wherein said routing step further comprises the steps of: determining the destinations of said distributed data by routing said header portion of each of said packets through said self-routing network circuit at said reduced clock rate; and reordering said distributed data in each of said plurality of transport channels at said reduced clock rate according to said routing determinations made by said self-routing network circuit.
Claim 5
Dependent Claim
127 words
The method as recited in claim 3, wherein said step of distributing the data to be routed further comprises: receiving the data serially as a fixed number of said data packets of identical length, said fixed number of said packets received in parallel, said data portion of each of said packets containing the same number of data bits and said header portion of each of said packets containing the same number of header bits; splitting said received data packets into words, each of said words containing one bit from each of said received packets, each of said one bits occupying the same serial position in each of said received packets; and inputting said words sequentially into one of said plurality of transport channels in an alternating fashion.
Claim 6
Dependent Claim
152 words
The method as recited in claim 4, wherein said self-routing fabric further comprises a plurality of routing segments, each of said channels coupled to at least one of said plurality of routing segments, and wherein said step of reordering said distributed data in each of said plurality of transport channels according to said routing determinations made by said self-routing network circuit further comprises the steps of: communicating the states of switching nodes in said self-routing network circuit to said plurality of routing segments; and setting switching nodes in said plurality of routing segments to duplicate said communicated states of said self-routing network circuit so that the data bits of said data portion of one of said packets passing through said plurality of routing segments can be reordered in the same way as the header bits of said header portion of said one of said packets were reordered by said self-routing network circuit.
Claim 7
Dependent Claim
34 words
The method as recited in claim 4, wherein said distributing step further comprises the step of generating a header control signal to mark the beginning of a new set of said received data packets.
Claim 8
Dependent Claim
63 words
The method as recited in claim 6, wherein said apparatus further comprises at least one header channel for transporting said header control signal, and wherein said transporting step further comprises the step of transporting said header control signal in said at least one header channel to mark the forward progress of said words comprising said header bits in said plurality of transport channels.
Claim 9
Dependent Claim
51 words
The method as recited in claim 3, wherein said step of transporting said distributed data through each of said plurality of transport channels further comprises the step of shifting said distributed data in each of said plurality of transport channels through a series of offset registers at said reduced clock rate.
Claim 10
Dependent Claim
143 words
A self-routing packet switching apparatus for reducing the clock frequency necessary to route data through said apparatus at a given bandwidth, said given bandwidth determining a clock rate at which the data to be routed enters and the routed data exits said apparatus, said apparatus comprising: means for distributing the data to be routed among a plurality of transport channels; means for transporting said distributed data through each of said plurality of transport channels at a reduced clock rate substantially equal to said entering and exiting clock rate divided by the number of said plurality of transport channels; a self-routing fabric means for routing said distributed data at said reduced clock rate, said self-routing fabric means coupled to said plurality of transport channels; and means for reassembling said routed data at the output of said apparatus at said entering and exiting clock rate.
Claim 11
Dependent Claim
143 words
A self-routing packet switching apparatus for reducing the clock frequency necessary to route data through said apparatus at a given bandwidth, said given bandwidth determining a clock rate at which the data to be routed enters and the routed data exits said apparatus, said apparatus comprising: means for distributing the data to be routed among a plurality of transport channels; means for transporting said distributed data through each of said plurality of transport channels at a reduced clock rate substantially equal to said entering and exiting clock rate divided by the number of said plurality of transport channels; a self-routing fabric means for routing said distributed data at said reduced clock rate, said self-routing fabric means coupled to said plurality of transport channels; and means for reassembling said routed data at the output of said apparatus at said entering and exiting clock rate.
Claim 12
Dependent Claim
64 words
The apparatus as recited in claim 9, wherein said self-routing fabric means further comprises a self-routing network circuit, and wherein the data to be routed is organized into packets, each of said packets comprising a header portion and a data portion, and wherein said means for transporting further comprises means for transmitting said header portion of said data packets to said self-routing network circuit.
Claim 13
Dependent Claim
74 words
The apparatus as recited in claim 10, wherein said self-routing fabric means further comprises: means for determining the destinations of said distributed data by routing said header portion of each of said packets through said self-routing network circuit at said reduced clock rate; and means for reordering said distributed data in each of said plurality of transport channels at said reduced clock rate according to said routing determinations made by said self-routing network circuit.
Claim 14
Dependent Claim
133 words
The apparatus as recited in claim 11, wherein said means for distributing the data to be routed further comprises: means for receiving the data serially as a fixed number of said data packets of identical length, said fixed number of said packets received in parallel, said data portion of each of said packets containing the same number of data bits and said header portion of each of said packets containing the same number of header bits; means for splitting said received data packets into words, each of said words containing one bit from each of said received packets, each of said one bits occupying the same serial position in each of said received packets; and means for inputting said words sequentially into one of said plurality of transport channels in an alternating fashion.
Claim 15
Dependent Claim
149 words
The apparatus as recited in claim 12, wherein said means for reordering said distributed data in each of said plurality of transport channels according to said routing determinations made by said self-routing network circuit further comprises: a plurality of routing segments, each of said plurality of transport channels coupled to at least one of said plurality of routing segments; means for communicating the states of switching nodes in said self-routing network circuit to said plurality of routing segments; and means for setting switching nodes in said plurality of routing segments to duplicate said communicated states of said self-routing network circuit so that the data bits of said data portion of one of said packets passing through said plurality of routing segments can be reordered in the same way as the header bits of said header portion of said one of said packets were reordered by said self-routing network circuit.
Claim 16
Dependent Claim
35 words
The apparatus as recited in claim 12, wherein said means for distributing further comprises a means for generating a header control signal to mark the beginning of a new set of said received data packets.
Claim 17
Dependent Claim
43 words
The apparatus as recited in claim 14, wherein said means for transporting further comprises at least one header channel for transporting said header control signal to mark the forward progress in said plurality of transport channels of said words comprising said header bits.
Claim 18
Dependent Claim
51 words
The apparatus as recited in claim 11, wherein said means for transporting said distributed data through each of said plurality of transport channels further comprises a means for shifting said distributed data in each of said plurality of transport channels through a series of offset registers at said reduced clock rate.
Claim 19
Independent Claim
176 words
An apparatus for routing data at a given bandwidth, said bandwidth defining a clock rate at which the data to be routed enters said apparatus and the routed data exits said apparatus, said apparatus comprising: an input demultiplexer having a plurality of inputs coupled to a source of the data to be routed; a transport pipeline having a plurality of inputs coupled to a plurality of outputs of said input demultiplexer; a self-routing fabric having a plurality of inputs coupled to a plurality of outputs of said transport pipeline; an output multiplexer having a plurality of inputs coupled to a plurality of outputs of said self-routing fabric, said output multiplexer having an output over which the routed data exits said apparatus; and wherein said input demultiplexer and said output multiplexer are coupled to a clock source operating at said entering and exiting clock rate, and wherein said transport pipeline and said self-routing fabric are coupled to a clock source operating at a reduced clock rate which is substantially less than said entering and exiting clock rate.
Claim 20
Independent Claim
176 words
An apparatus for routing data at a given bandwidth, said bandwidth defining a clock rate at which the data to be routed enters said apparatus and the routed data exits said apparatus, said apparatus comprising: an input demultiplexer having a plurality of inputs coupled to a source of the data to be routed; a transport pipeline having a plurality of inputs coupled to a plurality of outputs of said input demultiplexer; a self-routing fabric having a plurality of inputs coupled to a plurality of outputs of said transport pipeline; an output multiplexer having a plurality of inputs coupled to a plurality of outputs of said self-routing fabric, said output multiplexer having an output over which the routed data exits said apparatus; and wherein said input demultiplexer and said output multiplexer are coupled to a clock source operating at said entering and exiting clock rate, and wherein said transport pipeline and said self-routing fabric are coupled to a clock source operating at a reduced clock rate which is substantially less than said entering and exiting clock rate.
Claim 21
Dependent Claim
51 words
The apparatus as recited in claim 17 wherein the data to be routed is organized into packets, wherein said transport pipeline comprises a plurality of channels, and wherein said reduced clock rate is substantially equal to said entering and exiting clock rate divided by the number of said plurality of channels.
Claim 22
Dependent Claim
63 words
The apparatus as recited in claim 18 wherein each of said plurality of channels comprises a plurality of shift registers connected in series, inputs of the first of said series for each channel coupled to one of said plurality of outputs of said input demultiplexer, outputs of the last of said series for each channel coupled to an input of said self-routing fabric.
Claim 23
Dependent Claim
97 words
The apparatus as recited in claim 19 wherein said input demultiplexer serially receives a fixed number of said packets in parallel over a fixed number of inputs, said input demultiplexer forming words comprising one bit from each of said received packets, each said one bit occupying the same serial bit position in said received packets, said input demultiplexer inputting one of said words into each of the first of said series for each channel at said entering and exiting rate, said words advancing through the remainder of said series for each channel at said reduced clock rate.
Claim 24
Dependent Claim
151 words
The apparatus as recited in claim 18 or claim 20 wherein said packets further comprise a data portion and a header portion, and wherein said self-routing fabric further comprises: a self-routing network circuit; a means for providing said header portion of each of said packets to said self-routing network circuit, said header portion defining the destinations of the data comprising said data portion, said means for providing coupled between at least one of said plurality of channels and said self-routing network circuit; a plurality of routing segments each having an input coupled to one of said plurality of channels, each of said plurality of routing segments having an output coupled to said output multiplexer; and a plurality of pass/cross registers, coupled between said self-routing network circuit and said plurality of routing segments, to program said plurality of routing segments in accordance with destinations determined by said header portions of said packets.
Claim 25
Dependent Claim
43 words
The apparatus as recited in claim 21 wherein said means for providing said header portion comprises a multiplexer and a counter coupled to said multiplexer to sequentially select an appropriate one of said plurality of channels as a source of said header portion.
Claim 26
Dependent Claim
44 words
The apparatus as recited in claim 21 wherein said means for providing said header portion comprises a memory and a means for addressing said memory to sequentially select an appropriate one of said plurality of transport channels as a source of said header portion.
Claim 27
Dependent Claim
64 words
The apparatus as recited in claim 21 wherein said input demultiplexer further comprises a header control circuit having a control output to indicate when a new set of said fixed number of packets has been received, and wherein said transport pipeline further comprises a chain of single bit registers coupled to said header control circuit to transport said control output to said pass/cross registers.