US5339212A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sidewall decoupling capacitor
Assignee: International Business Machines Corp
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Filing: 1992-12-03
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Granted: 1994-08-16
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Expires: 2012-12-03
Abstract
Abstract The invention provides a decoupling capacitor which utilizes a plurality of tungsten studs and metal interconnects to maximize the surface area of the capacitor, thereby increasing the capacitance. The metal interconnects only partially overlap the tungsten studs, forming the first plate of the capacitor, so that the tops of the studs as well as the sides and tops of the interconnects provide the increased surface area. A method of forming the capacitors, and a method of increasing capacitance of a capacitor, are also provided.
Inventors
- 👤 Robert M. Geffken
- 👤 Lawrence J. Dunlop
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 13:15
CPC Classifications
H; H01; H01G; H01G4/00; H01G4/002; H01G4/005; H01G4/012; H10; H10W; H10W44/00; H10W44/601; Y; Y10; Y10T; Y10T29/00; Y10T29/43; Y10T29/435
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
192 words
A capacitor comprising: a) a first plate, said first plate comprising: an interlevel insulator layer having a top surface thereof; a first plurality of vias extending into said top surface of said interlevel insulator layer; a conductive material filling each of said first plurality of vias, said conductive material having a top surface thereof; a first plurality of interconnect lines overlying said interlevel insulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material; wherein a top surface of said first plate is formed by non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surfaces of said interconnect lines, and said second sidewalls of said interconnect lines; b) a dielectric insulator layer overlying said top surface of said first plate; and c) a second plate overlying said dielectric insulator layer, said second plate comprising a conductive layer.
Claim 2
Dependent Claim
192 words
A capacitor comprising: a) a first plate, said first plate comprising: an interlevel insulator layer having a top surface thereof; a first plurality of vias extending into said top surface of said interlevel insulator layer; a conductive material filling each of said first plurality of vias, said conductive material having a top surface thereof; a first plurality of interconnect lines overlying said interlevel insulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material; wherein a top surface of said first plate is formed by non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surfaces of said interconnect lines, and said second sidewalls of said interconnect lines; b) a dielectric insulator layer overlying said top surface of said first plate; and c) a second plate overlying said dielectric insulator layer, said second plate comprising a conductive layer.
Claim 3
Dependent Claim
248 words
The capacitor of claim 1 further comprising: a) a third plate overlying said second plate, said third plate comprising: a second interlevel insulator layer having a top surface thereof; a second plurality of vias extending into said top surface of said second interlevel insulator layer; a second conductive material filling each of said second plurality of vias, said conductive material having a top surface thereof; a second plurality of interconnect lines overlying said second interlevel insulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said second interlevel insulator layer partially overlapping said second conductive material, each of said interconnect lines of said second plurality thereby being electrically connected to said second conductive material; wherein a top surface of said third plate is formed by non-overlapped top surface of said second conductive material, said first sidewalls of said interconnect lines, said top surfaces of said interconnect lines, and said second sidewalls of said interconnect lines, and wherein a substantially horizontal midpoint of each one of said first plurality of interconnects is substantially vertically aligned with a substantially horizontal midpoint of a respective one of said second plurality of vias; b) a second dielectric insulator layer overlying said top surface of said third plate; and c) a fourth plate overlying said second dielectric insulator layer, said fourth plate comprising a conductive layer.
Claim 4
Dependent Claim
29 words
The capacitor of claim 2 wherein said conductive material filling said first plurality of vias and said second conductive material filling said second plurality of vias each comprise tungsten.
Claim 5
Dependent Claim
11 words
The capacitor of claim 1 wherein said interconnect lines comprise metal.
Claim 6
Dependent Claim
13 words
The capacitor of claim 1 wherein said dielectric insulator layer comprises silicon nitride.
Claim 7
Dependent Claim
12 words
The capacitor of claim 1 wherein said conductive layer comprises titanium nitride.
Claim 8
Dependent Claim
11 words
The capacitor of claim 1 wherein said conductive layer comprises aluminum.
Claim 9
Dependent Claim
11 words
The capacitor of claim 1 wherein said conductive layer comprises tungsten.
Claim 10
Dependent Claim
25 words
The capacitor of claim 1 wherein said top surface of said conductive material is substantially planar with said top surface of said interlevel insulator layer.
Claim 11
Dependent Claim
19 words
The capacitor of claim 1 wherein said dielectric insulator layer conformally overlies said top surface of said first plate.
Claim 12
Dependent Claim
261 words
A capacitor comprising two or more capacitors stacked one on the other to form relative upper and lower capacitors, each of said two or more capacitors comprising: a) a first plate, said first plate comprising: an interlevel insulator layer having a surface thereof; a plurality of vias extending into said top surface of said interlevel insulator layer; a conductive material filling each of said first plurality of vias, said conductive material having a top surface thereof; a plurality of interconnect lines overlying said interlevel insulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material; wherein a top surface of said first plate is formed by non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surfaces of said interconnect lines, and said second sidewalls of said interconnect lines; b) a dielectric insulator layer overlying said top surface of said first plate ; and c) a second plate overlying said dielectric insulator layer, said second plate comprising a conductive layer, wherein a substantially horizontal midpoint of each of said plurality of interconnect lines of said first plate of a lower capacitor is substantially vertically aligned with a substantially horizontal midpoint of a respective one of said plurality of vias of said first plate of an upper capacitor.
Claim 13
Dependent Claim
261 words
A capacitor comprising two or more capacitors stacked one on the other to form relative upper and lower capacitors, each of said two or more capacitors comprising: a) a first plate, said first plate comprising: an interlevel insulator layer having a surface thereof; a plurality of vias extending into said top surface of said interlevel insulator layer; a conductive material filling each of said first plurality of vias, said conductive material having a top surface thereof; a plurality of interconnect lines overlying said interlevel insulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material; wherein a top surface of said first plate is formed by non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surfaces of said interconnect lines, and said second sidewalls of said interconnect lines; b) a dielectric insulator layer overlying said top surface of said first plate ; and c) a second plate overlying said dielectric insulator layer, said second plate comprising a conductive layer, wherein a substantially horizontal midpoint of each of said plurality of interconnect lines of said first plate of a lower capacitor is substantially vertically aligned with a substantially horizontal midpoint of a respective one of said plurality of vias of said first plate of an upper capacitor.
Claim 14
Independent Claim
189 words
A method of forming a capacitor, said method comprising: a) forming a plurality of vias extending into a top surface of an interlevel insulator layer; b) filling each of said plurality of vias with a conductive material, said conductive material having a top surface thereof; c) forming a plurality of interconnect lines overlying said interlevelinsulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material, wherein a top surface of a first plate of a capacitor is formed by a non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surface of said interconnect lines, and said second sidewalls of said interconnect lines; d) forming a dielectric insulator layer over said top surface of said first plate; and e) forming a second plate over said dielectric insulator layer, said second plate comprising a conductive layer.
Claim 15
Independent Claim
189 words
A method of forming a capacitor, said method comprising: a) forming a plurality of vias extending into a top surface of an interlevel insulator layer; b) filling each of said plurality of vias with a conductive material, said conductive material having a top surface thereof; c) forming a plurality of interconnect lines overlying said interlevelinsulator layer, each of said interconnect lines having a top surface, first and second opposing sidewalls, and a bottom surface, wherein said bottom surface of each of said interconnect lines is positioned upon said top surface of said interlevel insulator layer partially overlapping said conductive material, each of said interconnect lines thereby being electrically connected to said conductive material, wherein a top surface of a first plate of a capacitor is formed by a non-overlapped top surface of said conductive material, said first sidewalls of said interconnect lines, said top surface of said interconnect lines, and said second sidewalls of said interconnect lines; d) forming a dielectric insulator layer over said top surface of said first plate; and e) forming a second plate over said dielectric insulator layer, said second plate comprising a conductive layer.
Claim 16
Dependent Claim
9 words
A capacitor formed by the method of claim 12.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1997-08-15 | 1998-02-14 | 1998-08-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-15 | 2002-02-14 | 2002-08-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-15 | 2006-02-14 | 2006-08-16 | $7700.00 | Window Closed / Lapsed |