US5335203A
Expired / Lapsed
US
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Semiconductor integrated circuit device with internal voltage drop circuits
Assignee: Micron Memory Japan Ltd
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Filing: 1992-02-12
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Granted: 1994-08-02
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Expires: 2012-02-12
Abstract
Abstract A semiconductor memory device has a plurality of divided memory blocks, each of which has its X-system addresses assigned so that an equal number of word lines in a plurality of sets of memory mats and sense amplifiers may be selected. Each memory block is equipped with a plurality of internal voltage drop circuits for generating a supply voltage from the outside into the operating voltages of the sense amplifiers.
Inventors
- 👤 Kyoko Ishii
- 👤 Shinichi Miyatake
- 👤 Tsutomu Takahashi
- 👤 Shinji Udo
- 👤 Hiroshi Yoshioka
- 👤 Mitsuhiro Takano
- 👤 Makoto Morino
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:15
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C5/00; G11C5/14; G11C5/147; G11C7/00; G11C7/06; G11C8/00; G11C8/12
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
111 words
A semiconductor integrated circuit device comprising: a plurality of divided memory blocks, each of which includes a plurality of sets of memory mats arranged with dynamic memory cells in a matrix shape and sense amplifiers for amplifying signals read out of said memory mats; a plurality of internal voltage drop circuits, each of which is coupled to receive a supply voltage from outside of the semiconductor integrated circuit device for generating operating voltages of said sense amplifiers; and a plurality of pads, each of which respectively corresponds to a predetermined one of said internal voltage drop circuits, for respectively coupling said plurality of internal voltage drop circuits to said supply voltage.
Claim 2
Dependent Claim
111 words
A semiconductor integrated circuit device comprising: a plurality of divided memory blocks, each of which includes a plurality of sets of memory mats arranged with dynamic memory cells in a matrix shape and sense amplifiers for amplifying signals read out of said memory mats; a plurality of internal voltage drop circuits, each of which is coupled to receive a supply voltage from outside of the semiconductor integrated circuit device for generating operating voltages of said sense amplifiers; and a plurality of pads, each of which respectively corresponds to a predetermined one of said internal voltage drop circuits, for respectively coupling said plurality of internal voltage drop circuits to said supply voltage.
Claim 3
Dependent Claim
24 words
A semiconductor integrated circuit device according to claim 1, wherein an equal number of word lines is selected in each of said memory blocks.
Claim 4
Dependent Claim
81 words
A semiconductor integrated circuit device according to claim 1, wherein said plurality of pads includes a first group of pads that are coupled to a positive potential of said supply voltage and a second group of pads that are coupled to a negative potential of said supply voltage, wherein each of said plurality of internal voltage drop circuits is respectively coupled to a predetermined pad of said first group of pads and a predetermined pad of said second group of pads.
Claim 5
Dependent Claim
40 words
A semiconductor integrated circuit device according to claim 1, wherein each of said pads is coupled to only one of the internal voltage drop circuits to minimize current flow on wirings between said pads and said internal voltage drop circuits.
Claim 6
Dependent Claim
40 words
A semiconductor integrated circuit device according to claim 3, wherein each of said pads is coupled to only one of the internal voltage drop circuits to minimize current flow on wirings between said pads and said internal voltage drop circuits.
Claim 7
Dependent Claim
90 words
A semiconductor integrated circuit device according to claim 2, further comprising: a feedback amplifier for amplifying a predetermined reference voltage in accordance with a resistance ratio of resistance elements comprising a feedback circuit thereby to generate a constant voltage; a power supply circuit in a voltage follower mode for amplifying the power of said constant voltage to generate a supply voltage necessary for the operations of said internal voltage drop circuits; and a signal wiring formed through a shield conductive layer over resistance elements comprising at least said feedback circuit.
Claim 8
Dependent Claim
40 words
A semiconductor integrated circuit device according to claim 6, wherein said resistance elements are made of a first poly-silicon layer, and wherein said shield layer is made of a second or third poly-silicon layer formed over the first poly-silicon layer.
Claim 9
Dependent Claim
130 words
A semiconductor integrated circuit device, wherein said feedback amplifier according to claim 3 is commonly disposed in a central portion of a semiconductor integrated circuit device comprising: a plurality of divided memory blocks, each of which includes a plurality sets of memory mats arranged with dynamic memory cells in a matrix shape and sense amplifiers for amplifying signals read out of said memory mats; a data memory unit having X-addresses assigned so that an equal number of word lines may be selected in each of said memory blocks; and a plurality of internal voltage drop circuits made receptive of a supply voltage from the outside for generating the operating voltages of said sense amplifiers, whereby said feedback amplifier has its constant voltage transmitted to each of said voltage drop circuits.
References Cited (Backward Citations)
JPS6394499A
Cited
US5179539A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-08-01 | 1998-01-31 | 1998-08-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-08-01 | 2002-01-31 | 2002-08-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-08-01 | 2006-01-31 | 2006-08-02 | $7700.00 | Window Closed / Lapsed |