US5331581A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Artificial random-number pattern generating circuit
Assignee: NEC Corp
•
Filing: 1992-01-10
•
Granted: 1994-07-19
•
Expires: 2012-01-10
Abstract
Abstract An artificial random-number pattern generating circuit has a plurality of flip-flops each having a set signal input terminal and a clock signal input terminal; a plurality of selectors each of which forwards its output to the corresponding flip-flop and receives a first operation mode signal and/or a second operation mode signal; and an exclusive logical OR gate. The artificial random-number pattern generating circuit functions in three different ways, that is, as an artificial random-number pattern generator, a boundary scanning buffer or an input buffer, in accordance with the combinations of the first and second operation mode signals. The circuit can make not only a diagnosis of failure in the internal circuit of the large-scale integration (LSI) but also overall tests including those for input and output buffer circuits of the mounted LSI chip on a board or those for external wirings for the LSI.
Inventors
- 👤 Chie Ohkubo
- 👤 Yasuhiko Hagihara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:04
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3183; G01R31/318385; G01R31/31712; G01R31/31715; G01R31/31813; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/27; G06F7/00; G06F7/58; G06F7/582; G06F7/584; G06F2207/00; G06F2207/58; G06F2207/581; G06F2207/583
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
161 words
An N-bit artificial random-number pattern generator, comprising: a plurality of N flip-flops, a first to N-th (N≧2), each of which has an input terminal, a set signal input terminal and a clock signal input terminal; a plurality of (N-1) selectors, a first to (N-1)th, each of which receives an output of said (1+i)th (1≦i≦(N-1)) flip-flop and an i-th input data and selectively forwards its output to said input terminal of said i-th flip-flop; artificial random-number producing means for receiving outputs from at least two of said N flip-flops, conducting a predetermined logical operation on said outputs, and outputting an artificial random-number data of 1 bit; and an N-th selector which receives the output data from said artificial random-number producing means, an external output data, and an N-th input data, and which selectively forwards its output to the input terminal of said N-th flip-flop, said N-th selector being directly supplied with a first operation mode signal and a second operation mode signal.
Claim 2
Dependent Claim
161 words
An N-bit artificial random-number pattern generator, comprising: a plurality of N flip-flops, a first to N-th (N≧2), each of which has an input terminal, a set signal input terminal and a clock signal input terminal; a plurality of (N-1) selectors, a first to (N-1)th, each of which receives an output of said (1+i)th (1≦i≦(N-1)) flip-flop and an i-th input data and selectively forwards its output to said input terminal of said i-th flip-flop; artificial random-number producing means for receiving outputs from at least two of said N flip-flops, conducting a predetermined logical operation on said outputs, and outputting an artificial random-number data of 1 bit; and an N-th selector which receives the output data from said artificial random-number producing means, an external output data, and an N-th input data, and which selectively forwards its output to the input terminal of said N-th flip-flop, said N-th selector being directly supplied with a first operation mode signal and a second operation mode signal.
Claim 3
Dependent Claim
191 words
An N-bit artificial random-number pattern generator according to claim 1, further comprising means for performing an exclusive logical OR operation of said output of said (1+i)th flip-flop and said i-th input data, wherein each of said plurality of (N-1) selectors is supplied with said first operation mode signal and said second operation mode signal, and selectively forwards to said input terminal of said i-th flip-flop one of said output of said (1+i)th flip-flop and said i-th input data, or an exclusive logical OR thereof in accordance with said first operation mode signal and said second operation mode signal; and wherein said N-th selector selectively forwards to the input terminal of said N-th flip-flop one of said external output data and said N-th input data, or an exclusive logical OR of said output data from said artificial random-number producing means and said N-th input data in accordance with said first and second operation mode signals, whereby said artificial random-number pattern generator is selectively operable as one of an artificial random-number pattern generator, a boundary scanning buffer and an input buffer in accordance with combinations of said first and second operation mode signals.
Claim 4
Dependent Claim
141 words
An N-bit artificial random-number pattern generator according to claim 1, in which: each of said plurality of (N-1) selectors is supplied with said first operation mode signal, and selectively forwards to said input terminal of said i-th flip-flop one of said output of said (1+i)th flip flop and said i-th input data in accordance with said first operation mode signal; and said N-th selector selectively forwards to the input terminal of said N-th flip-flop one of said output data from said artificial random-number producing means, said external output data and said N-th input data in accordance with said first and second operation mode signals, whereby said artificial random-number pattern generator is selectively operable as one of an artificial random-number pattern generator, a boundary scanning buffer and an input buffer in accordance with combinations of said first and second operation mode signals.
Claim 5
Dependent Claim
40 words
An N-bit artificial random-number pattern generator according to claim 1, in which said artificial random-number producing means comprises an exclusive OR gate which conducts an exclusive logical OR operation of at least two outputs from said plurality of N flip-flops.
Claim 6
Dependent Claim
171 words
An N-bit artificial random-number pattern generator, comprising: a plurality of (N+1) flip-flops, a first to (N+1)th (N≧2), each of which has an input terminal, a set signal input terminal and a clock signal input terminal; a plurality of N selectors, a first to N-th, each of which receives an output of said (1+i)th (1≦i≦N) flip-flop and an i-th input data and selectively forwards its output to said input terminal of said i-th flip-flop; artificial random-number producing means for receiving outputs from at least two of said (N+1) flip-flops, conducting a predetermined logical operation on said outputs, and outputting an artificial random-number data of 1 bit; and an (N+1)th selector which receives the output data from said artificial random-number producing means and an external output data, and which selectively forwards to the input terminal of said (N+1)th flip-flop one of said output data from said artificial random-number producing means and said external output data, said (N+1)th selector being directly supplied with a first operation mode signal and a second operation mode signal.
Claim 7
Dependent Claim
171 words
An N-bit artificial random-number pattern generator, comprising: a plurality of (N+1) flip-flops, a first to (N+1)th (N≧2), each of which has an input terminal, a set signal input terminal and a clock signal input terminal; a plurality of N selectors, a first to N-th, each of which receives an output of said (1+i)th (1≦i≦N) flip-flop and an i-th input data and selectively forwards its output to said input terminal of said i-th flip-flop; artificial random-number producing means for receiving outputs from at least two of said (N+1) flip-flops, conducting a predetermined logical operation on said outputs, and outputting an artificial random-number data of 1 bit; and an (N+1)th selector which receives the output data from said artificial random-number producing means and an external output data, and which selectively forwards to the input terminal of said (N+1)th flip-flop one of said output data from said artificial random-number producing means and said external output data, said (N+1)th selector being directly supplied with a first operation mode signal and a second operation mode signal.
Claim 8
Dependent Claim
184 words
An N-bit artificial random-number pattern generator according to claim 5, further comprising means for performing an exclusive logical OR operation of said output of said (1+i)th flip-flop and said i-th input data, wherein each of said plurality of N selectors is supplied with said first operation mode signal and said second operation mode signal, and selectively forwards to said input terminal of said i-th flip-flop one of said output of said (1+i)th flip-flop and said i-th input data, or an exclusive logical OR thereof in accordance with said first operation mode signal and a second operation mode signal; and wherein said (N+1)th selector is supplied with said second operation mode signal and selectively forwards to the input terminal of said (N+1)th flip-flop one of said output data from said artificial random number producing means and said external output data in accordance with said second operation mode signal, whereby said artificial random-number pattern generator is selectively operable as one of an artificial random-number pattern generator, a boundary scanning buffer and an input buffer in accordance with combinations of said first and second operation mode signals.
Claim 9
Dependent Claim
134 words
An N-bit artificial random-number pattern generator according to claim 5, in which: each of said plurality of N selectors is supplied with said first operation mode signal, and selectively forwards to said input terminal of said i-th flip-flop one of said output of said (1+i)th flip-flop and said i-th input data in accordance with said first operation mode signal; and said (N+1)th selector selectively forwards to the input terminal of said (N+1)th flip-flop one of said output data from said artificial random-number producing means and said external output data in accordance with said second operation mode signal, whereby said artificial random-number pattern generator is selectively operable as one of an artificial random-number pattern generator, a boundary scanning buffer and an input buffer in accordance with combinations of said first and second operation mode signals.
Claim 10
Dependent Claim
40 words
An N-bit artificial random-number pattern generator according to claim 5, in which said artificial random-number producing means comprises an exclusive OR gate which conducts an exclusive logical OR operation of at least two outputs from said plurality of (N+1) flip-flops.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-18 | 1998-01-17 | 1998-07-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-18 | 2002-01-17 | 2002-07-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-18 | 2006-01-17 | 2006-07-19 | $7700.00 | Window Closed / Lapsed |