US5331194A
Expired / Lapsed
US
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Bipolar static induction transistor
Assignee: Fuji Electric Co Ltd
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Filing: 1992-10-30
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Granted: 1994-07-19
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Expires: 2012-10-30
Abstract
Abstract In a bipolar static induction transistor (BSIT) with increased input impedance, gate-voltage control is used for switching operations. The BSIT includes a collector region, a base region, an emitter region, and a source region in the base region. For enhanced turn-off, an auxiliary base region is included; alternatively, a drain region is provided in the base region.
Inventors
- 👤 Katsunori Ueno
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:28
CPC Classifications
H; H10; H10D; H10D12/00; H10D12/01; H10D12/031; H10D12/032; H10D12/211; H10D12/212
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
150 words
A bipolar transistor, comprising: a collector region of first conductivity type having first and second surfaces; a base region of second conductivity type having first and second surfaces formed in an insular form at the first surface of the collector region; an emitter region of first conductivity type adjoining the base region formed at the first surface of the collector region; a source region of first conductivity type formed in an insular form at the first surface of the base region which is electrically coupled with the source region; and a gate disposed on a gate insulator which is formed on a portion of the base region between the first surface of the collector region and the source region; wherein the current flowing between the collector region and the emitter region is controlled by a voltage applied to the gate with the base region and the source region short-circuited together.
Claim 2
Dependent Claim
150 words
A bipolar transistor, comprising: a collector region of first conductivity type having first and second surfaces; a base region of second conductivity type having first and second surfaces formed in an insular form at the first surface of the collector region; an emitter region of first conductivity type adjoining the base region formed at the first surface of the collector region; a source region of first conductivity type formed in an insular form at the first surface of the base region which is electrically coupled with the source region; and a gate disposed on a gate insulator which is formed on a portion of the base region between the first surface of the collector region and the source region; wherein the current flowing between the collector region and the emitter region is controlled by a voltage applied to the gate with the base region and the source region short-circuited together.
Claim 3
Dependent Claim
30 words
The bipolar transistor of claim 1, wherein the base region and the source region are short-circuited together by an electrode film disposed on the base region and the source region.
Claim 4
Dependent Claim
19 words
The bipolar transistor of claim 2, further comprising a variable resistor connected between the gate and the electrode film.
Claim 5
Dependent Claim
34 words
The bipolar transistor of claim 1 further comprising an auxiliary base region of second conductivity type between the emitter region and the collector region, the auxiliary base region being contiguous with the base region.
Claim 6
Dependent Claim
48 words
The bipolar transistor of claim 4, wherein the depth of said auxiliary base region is in the range from 1 to 2 micrometers, and the impurity concentration of the auxiliary base region is at least one order of magnitude lower than the impurity concentration of the base region.
Claim 7
Dependent Claim
102 words
The bipolar transistor of claim 1, further comprising: a drain region of first conductivity type formed in an insular form at the surface portion of the base region located between the emitter region and the source region; and a second gate disposed on a gate insulator which is formed on a portion of the base region between the emitter region and the drain region; wherein the current flowing between the collector region and the emitter region is controlled by a voltage applied to the first and second gates with the source region and the drain region short-circuited together with the base region.
References Cited (Backward Citations)
US5045909A
Cited
US5178370A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-07-18 | 1998-01-17 | 1998-07-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-07-18 | 2002-01-17 | 2002-07-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-07-18 | 2006-01-17 | 2006-07-19 | $7700.00 | Window Closed / Lapsed |