High-speed facility protection in a digital telecommunications system

Claim 3

The method of claim 1, wherein the monitoring step comprises: detecting coding violations in the received facility over a selected period of time, said errored condition including the number of detected coding violations exceeding a limit.

Claim 4

The method of claim 2, wherein said monitoring step further comprises: detecting a hard error signal in the received facility.

Claim 5

The method of claim 1, wherein said cross-connect further comprises first and second output ports coupled to the first and second redundant network lines, and coupled to receive digital signals from a head input port; further comprising: broadcasting said digital signals received at the head input port at both of said first and second output ports onto the first and second network lines.

Claim 6

The method of claim 4, wherein said broadcasting step is performed from a first stage of the switching matrix.

Claim 7

The method of claim 1, wherein said monitoring step further comprises: after detecting an error condition, coupling the second input port to a protection output port; and examining the facility at the protection output port; and wherein said connecting step is performed responsive to the step of examining the facility at said protection output port.

Claim 8

A cross-connect system having facility protection capability, comprising: a plurality of ports, including n east input port and a west input port for receiving a facility from east and west lines in a telecommunication system, and including a head output port for communicating the facility received at one of said east and west input ports to another network; a central processing unit, coupled to a bus; a cross-connect matrix of the Clos type, having first, center and third stages, said cross-connect matrix coupled to said bus; and an interface processing unit coupled to said bus and to said east and west input ports, comprising: a first interface processor coupled to a first stage of said cross-connect matrix associated with said east input port, for connecting a facility received thereat to a center stage of said cross-connect matrix, and for monitoring the received facility for an errored condition; a second interface processor coupled to a first stage of said cross-connect matrix associated with said west input port, for connecting a facility received thereat to a center stage of said cross-connect matrix, and for monitoring the received facility for an errored condition; and a third interface processor coupled to a third stage of said cross-connect matrix associated with said head output port, for coupling the third stage to one of said first stages to receive the facility from a first one of the east and west input ports, and for controlling the third stage to switch said head output port to receive the facility from a second one of said east and west input ports responsive to the monitoring performed by the interface processor associated with the first one of said east and west input ports indicating an errored condition.

Claim 9

A cross-connect system having facility protection capability, comprising: a plurality of ports, including n east input port and a west input port for receiving a facility from east and west lines in a telecommunication system, and including a head output port for communicating the facility received at one of said east and west input ports to another network; a central processing unit, coupled to a bus; a cross-connect matrix of the Clos type, having first, center and third stages, said cross-connect matrix coupled to said bus; and an interface processing unit coupled to said bus and to said east and west input ports, comprising: a first interface processor coupled to a first stage of said cross-connect matrix associated with said east input port, for connecting a facility received thereat to a center stage of said cross-connect matrix, and for monitoring the received facility for an errored condition; a second interface processor coupled to a first stage of said cross-connect matrix associated with said west input port, for connecting a facility received thereat to a center stage of said cross-connect matrix, and for monitoring the received facility for an errored condition; and a third interface processor coupled to a third stage of said cross-connect matrix associated with said head output port, for coupling the third stage to one of said first stages to receive the facility from a first one of the east and west input ports, and for controlling the third stage to switch said head output port to receive the facility from a second one of said east and west input ports responsive to the monitoring performed by the interface processor associated with the first one of said east and west input ports indicating an errored condition.

Claim 10

The system of claim 7, wherein said interface processing unit further comprises: a center interface processor coupled to the center stage of the cross-connect matrix to which the first stage is coupled by said first interface processor.

Claim 11

The system of claim 7, wherein said interface processing unit further comprises: a first first/third stage circuit associated with said east input port, controlled by said first interface processor; a second first/third stage circuit associated with said west input port, controlled by said second interface processor; and a third first/third stage circuit associated with said head output port, controlled by said third interface processor.

Claim 12

The system of claim 9, wherein said third first/third stage circuit is further associated with a protection output port; and wherein, responsive to the monitoring performed by the interface processor associated with the first one of said east and west input ports indicating an errored condition, said third interface processor controls said third first/third stage circuit to switch said protection output port to receive the facility from the second one of said east and west input ports for monitoring.

Claim 13

A digital telecommunications system, comprising: first and second transmission lines; and a first cross-connect, comprising: a plurality of ports, including first and second input ports for receiving a first facility from said first and second transmission lines, respectively, and including a head output port for presenting the first facility; a central processing unit, coupled to a bus; a cross-connect matrix of the Clos matrix type, having first, center and third stages, and coupled to said bus; an interface processing unit coupled to said bus and to said first and second input ports, for connecting the facility received at one of said first and second input ports to said cross-connect matrix, for monitoring the first facility to detect an error condition, and for switching to connect the other of said first and second input ports to said cross-connect matrix responsive to detecting the error condition, comprising: a plurality of interface processors; and a plurality of first/third stage circuits, each coupled to an associated one of said plurality of interface processors; wherein said first input port corresponds to a first one of said first/third stage circuits, controlled by a first one of said plurality of interface processors so that a facility received at the first input port is monitored for detection of an

Claim 14

A digital telecommunications system, comprising: first and second transmission lines; and a first cross-connect, comprising: a plurality of ports, including first and second input ports for receiving a first facility from said first and second transmission lines, respectively, and including a head output port for presenting the first facility; a central processing unit, coupled to a bus; a cross-connect matrix of the Clos matrix type, having first, center and third stages, and coupled to said bus; an interface processing unit coupled to said bus and to said first and second input ports, for connecting the facility received at one of said first and second input ports to said cross-connect matrix, for monitoring the first facility to detect an error condition, and for switching to connect the other of said first and second input ports to said cross-connect matrix responsive to detecting the error condition, comprising: a plurality of interface processors; and a plurality of first/third stage circuits, each coupled to an associated one of said plurality of interface processors; wherein said first input port corresponds to a first one of said first/third stage circuits, controlled by a first one of said plurality of interface processors so that a facility received at the first input port is monitored for detection of an

Claim 15

The system of claim 11, wherein said first cross-connect further comprises: first and second output ports, for broadcasting a second facility to said first and second transmission lines, respectively, from digital signals received at a head input port, said first and second output ports coupled to said head input port via said cross-connect matrix.

Claim 16

The system of claim 12, further comprising: a second cross-connect, comprising: a plurality of ports, including first and second input ports for receiving the second facility from said first and second transmission lines, respectively, and first and second output ports for broadcasting the first facility to said first and second transmission lines, respectively, including a head output port for presenting the second facility and a head input port for receiving digital signals corresponding to the first facility; a central processing unit, coupled to a bus; a cross-connect matrix, coupled to said bus; error condition at said first one of said plurality of first/third stage circuits; wherein said second input port corresponds to a second one of said first/third stage circuits, controlled by a second one of said plurality of interface processors; and wherein said first and second ones of said first/third stage circuits are coupled to a third one of said first/third stage circuits corresponding to said head output port, controlled by a third one of said plurality of interface processors so that, responsive to the detection of an error condition in the monitored facility received at the first input port, the third first/third stage switches said head output port to receive the facility from said second input port. an interface processing unit coupled to said bus and to said first and second input ports, for connecting the second facility received at one of said first and second input ports to said cross-connect matrix, for monitoring the second facility to detect an error condition, and for switching to connect the other of said first and second input ports to said cross-connect matrix responsive to detecting the error condition.