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US5327435A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for testing a processor module in a computer system

Assignee: Hewlett Packard Development Co LP
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Filing: 1992-11-13
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Granted: 1994-07-05
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Expires: 2012-11-13
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Abstract

Abstract A reliable diagnostic system for running power-up diagnostics, displaying power-up diagnostic results, and retaining a power system status history. First, a method of testing a processor module in a computer system is provided. A processor including a serial port reads processor module diagnostic test instructions from a PROM in a serial line controller through the serial port by way of a serial bus in response to power-up reset instructions. Next, a reliable means for connecting a serial control bus modules is provided. Accordingly, backplane connectors are provide including wide signal conducting elements having multiple solder connection points to the modules and backplane. The serial control bus is electrically connected to each module through the multiple connection points of these signal conducting elements. Also, an apparatus and method for indicating module failures in a computer system is provided. A console panel is provided in the computer system comprising LED's visible to the user, each LED corresponding to a particular module. Any LED which remains lit indicates the failure of the corresponding module. Finally, a method and apparatus is provided for maintaining a power system status history. Status indicators corresponding to various environmental conditions in the system are supplied. When any status indicator changes value, the status indicators are stored in a non-volatile memory. In the event of a system shutdown, the non-volatile memory then retains a status history representing the environmental changes prior to shutdown.

Inventors

  • 👤 Nicholas A. Warchol

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 18:51
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/30; G06F11/32; G06F11/324; G06F11/325; G06F11/22; G06F11/3003; G06F11/3024; G06F11/3058; G06F11/3062; G06F11/328; G06F11/07; G06F11/14; G06F11/1402; G06F11/1415

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 96 words
A method of testing a processor module in a computer system, the processor module including a processor containing a serial port and serial ROM coupled to the serial port by a serial bus, comprising: providing a non-volatile memory coupled to the serial bus, the non-volatile memory containing processor module diagnostic instructions; reading power-up instructions from the serial ROM into the processor via the serial bus in response to a system hardware reset; reading the processor module diagnostic test instructions from the non-volatile memory into the processor via the serial bus in response to the power-up instructions.
Claim 2
Independent Claim 96 words
A method of testing a processor module in a computer system, the processor module including a processor containing a serial port and serial ROM coupled to the serial port by a serial bus, comprising: providing a non-volatile memory coupled to the serial bus, the non-volatile memory containing processor module diagnostic instructions; reading power-up instructions from the serial ROM into the processor via the serial bus in response to a system hardware reset; reading the processor module diagnostic test instructions from the non-volatile memory into the processor via the serial bus in response to the power-up instructions.
Claim 3
Dependent Claim 18 words
The method of claim 1 wherein the non-volatile memory is a PROM contained within a serial line controller.
Claim 4
Independent Claim 103 words
A method of testing a processor module in a computer system, the processor module including a processor containing a serial port and serial ROM coupled to the serial port by a serial bus, comprising: providing a serial line controller including a PROM coupled to the serial bus, the PROM containing processor module diagnostic instructions; reading power-up instructions from the serial ROM into the processor via the serial bus in response to a system hardware reset; reading the processor module diagnostic test instructions from the PROM in the serial line controller into the processor via the serial bus in response to the power-up instructions.
Claim 5
Independent Claim 103 words
A method of testing a processor module in a computer system, the processor module including a processor containing a serial port and serial ROM coupled to the serial port by a serial bus, comprising: providing a serial line controller including a PROM coupled to the serial bus, the PROM containing processor module diagnostic instructions; reading power-up instructions from the serial ROM into the processor via the serial bus in response to a system hardware reset; reading the processor module diagnostic test instructions from the PROM in the serial line controller into the processor via the serial bus in response to the power-up instructions.

References Cited (Backward Citations)

US5251150A Cited
US5068851A Cited
US5276863A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-07-04 1998-01-03 1998-07-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-07-04 2002-01-03 2002-07-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-07-04 2006-01-03 2006-07-05 $7700.00 Window Closed / Lapsed

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