Video signal processing apparatus for reducing aliasing interference

Claim 2

A video signal processing apparatus for reducing aliasing interference comprising: an interpolating means which receives a high definition television signal which has been bandwidth-compressed by offset sub-sampling for interpolating a non-sample point from intra-field sample points of a sub-sampled signal; a field averaging means for performing an inter-field averaging process from data of three adjacent fields of a signal thus interpolated; a frame averaging means for performing an inter-frame averaging process; and a correlation discriminating means connected to a signal switching means for detecting one field difference and one frame difference and for switching an output signal of said inter-field averaging means and an output signal of said inter-frame averaging means in accordance with magnitudes of the differences thus detected.

Claim 3

A video signal processing apparatus according to claim 1, further comprising: a motion detection circuit for detecting a motion of an image from data of three adjacent fields of an interpolated signal; and a mixing circuit for mixing an output signal of said signal switching means and an output signal of said interpolating means in accordance with the motion of an image thus detected.

Claim 4

A video signal processing apparatus for reducing aliasing interference comprising: an interpolating means which receives a high definition television signal which has been bandwidth-compressed by offset sub-sampling for interpolating a non-sample point from intra-field sample points to a sub-sampled signal; a first memory means for delaying a signal thus interpolated for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a first adder means for performing an inter-field averaging process from an input signal of said first memory means and an output signal of said second memory means; a second adder means for performing an inter-frame averaging process from an input signal of said first memory means and an output signal of said second memory means; a correlation discriminating means for detecting one field difference and one frame difference from input and output signals of said first and second memory means and for outputting a switching signal in accordance with magnitudes of the difference thus detected; and signal switching means for switching an output signal of said first adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 5

A video signal processing apparatus for reducing aliasing interference comprising: an interpolating means which receives a high definition television signal which has been bandwidth-compressed by offset sub-sampling for interpolating a non-sample point from intra-field sample points to a sub-sampled signal; a first memory means for delaying a signal thus interpolated for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a first adder means for performing an inter-field averaging process from an input signal of said first memory means and an output signal of said second memory means; a second adder means for performing an inter-frame averaging process from an input signal of said first memory means and an output signal of said second memory means; a correlation discriminating means for detecting one field difference and one frame difference from input and output signals of said first and second memory means and for outputting a switching signal in accordance with magnitudes of the difference thus detected; and signal switching means for switching an output signal of said first adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 6

A video signal processing apparatus according to claim 3, further comprising: a motion detection circuit for detecting a motion of an image from an input signal of said first memory and an output signal of said second memory; and a mixing circuit for mixing an output signal of said switching means and an input signal of said first memory means in accordance with the motion of an image thus detected.

Claim 7

A video signal processing apparatus for reducing aliasing interference comprising: a first memory means for delaying a high definition television signal which has been bandwidth-compressed by offset sub-sampling for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; first, second and third interpolating means for interpolating non-sampling points from intra-field sample points of a sub-sampled signal in accordance with input and output signals of said first and second memory means; a first adder means for performing an inter-field averaging process from an output signal of said first interpolating means and an output signal of said second interpolating means; a second adder means for performing an inter-frame averaging process from an output signal of said first interpolating means and an output signal of said third interpolating means; a correlation discriminating means for detecting one field difference and one frame difference from output signals of said first, second and third interpolating means and for outputting a switching signal in accordance with magnitudes of differences thus detected; and a signal switching means for switching an output signal of said first adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 8

A video signal processing apparatus for reducing aliasing interference comprising: a first memory means for delaying a high definition television signal which has been bandwidth-compressed by offset sub-sampling for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; first, second and third interpolating means for interpolating non-sampling points from intra-field sample points of a sub-sampled signal in accordance with input and output signals of said first and second memory means; a first adder means for performing an inter-field averaging process from an output signal of said first interpolating means and an output signal of said second interpolating means; a second adder means for performing an inter-frame averaging process from an output signal of said first interpolating means and an output signal of said third interpolating means; a correlation discriminating means for detecting one field difference and one frame difference from output signals of said first, second and third interpolating means and for outputting a switching signal in accordance with magnitudes of differences thus detected; and a signal switching means for switching an output signal of said first adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 9

A video signal processing apparatus according to claim 5, further comprising: a motion detection circuit for detecting a motion of an image from an output signal of said first interpolating means and an output signal of said third interpolating means; and a mixing circuit for mixing an output signal of said signal switching means and an output signal of said first interpolating means in accordance with the motion of an image thus detected.

Claim 10

A video signal processing apparatus according to claim 5, further comprising: a motion detection circuit for detecting a motion of an image from an input signal of said first memory means and an output signal of said second memory means; and a mixing circuit for mixing an output signal of said signal switching means and an output signal of said first interpolating means in accordance with the motion of an image thus detected.

Claim 11

A video signal processing apparatus for reducing aliasing interference comprising: an interpolating means which receives a high definition television signal which has been bandwidth-compressed by offset sub-sampling for interpolating a non-sample point from intra-field sample points of a sub-sampled signal; a first memory means for delaying a signal thus interpolated for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a median-value signal selection means for extracting a median-value signal of three adjacent inter-field signals from input and output signals of said first and second adder means; a first adder means for averaging an output signal of said first adder means and an output signal of said median-value signal selection means; a second adder means for performing an inter-frame averaging process from an input signal of said first memory means and an output signal of said second memory means; a correlation discriminating means for detecting one field difference and one frame difference from input and output signals of said first and second memory means and for outputting a switching signal in accordance with magnitudes of differences thus detected; and a signal switching means for switching an output signal of said first adder means an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 12

A video signal processing apparatus for reducing aliasing interference comprising: an interpolating means which receives a high definition television signal which has been bandwidth-compressed by offset sub-sampling for interpolating a non-sample point from intra-field sample points of a sub-sampled signal; a first memory means for delaying a signal thus interpolated for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a median-value signal selection means for extracting a median-value signal of three adjacent inter-field signals from input and output signals of said first and second adder means; a first adder means for averaging an output signal of said first adder means and an output signal of said median-value signal selection means; a second adder means for performing an inter-frame averaging process from an input signal of said first memory means and an output signal of said second memory means; a correlation discriminating means for detecting one field difference and one frame difference from input and output signals of said first and second memory means and for outputting a switching signal in accordance with magnitudes of differences thus detected; and a signal switching means for switching an output signal of said first adder means an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 13

A video signal processing apparatus according to claim 8, further comprising: a motion detection circuit for detecting a motion of an image from an input signal of said first memory means and an output signal of said second memory means; and mixing means for mixing an output signal of said signal switching means and an output signal of said first memory means in accordance with the motion of an image thus detected.

Claim 14

A video signal processing apparatus for reducing aliasing interference comprising: a first memory means for delaying a high definition television signal which has been bandwidth-compressed by offset sub-sampling for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a first, second and third interpolating means for interpolating non-sample points from intra-field sample points of a sub-sampled signal in accordance with input and output signals of said first and second memory means; a median-value signal selection means for extracting a median-value signal of three adjacent inter-field signals from output signals of said first, second and third interpolating means; a first adder means for averaging an output signal of said second interpolating means and an output signal of said median-value signal selection means; a second adder means for performing an inter-frame averaging process from an output signal of said first interpolating means and an output signal of said third interpolating means; a correlation discriminating means for detecting one field difference and one frame difference from output signals of said first, second and third interpolating circuits and for outputting a switching signal in accordance with the magnitudes of differences thus detected; and a signal switching means for switching an output signal of said adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 15

A video signal processing apparatus for reducing aliasing interference comprising: a first memory means for delaying a high definition television signal which has been bandwidth-compressed by offset sub-sampling for one field period; a second memory means for delaying an output signal of said first memory means for a further one field period; a first, second and third interpolating means for interpolating non-sample points from intra-field sample points of a sub-sampled signal in accordance with input and output signals of said first and second memory means; a median-value signal selection means for extracting a median-value signal of three adjacent inter-field signals from output signals of said first, second and third interpolating means; a first adder means for averaging an output signal of said second interpolating means and an output signal of said median-value signal selection means; a second adder means for performing an inter-frame averaging process from an output signal of said first interpolating means and an output signal of said third interpolating means; a correlation discriminating means for detecting one field difference and one frame difference from output signals of said first, second and third interpolating circuits and for outputting a switching signal in accordance with the magnitudes of differences thus detected; and a signal switching means for switching an output signal of said adder means and an output signal of said second adder means in accordance with the switching signal from said correlation discriminating means.

Claim 16

A video signal processing apparatus according to claim 10, further comprising: a motion detection circuit for detecting a motion of an image from an output signal of said first interpolating means and an output signal of said third interpolating means; and a mixing circuit for mixing an output signal of said signal switching means and an output signal of said second interpolating means in accordance with the motion of an image thus detected.

Claim 17

A video signal processing apparatus according to claim 11, further comprising: a motion detection circuit for detecting a motion of an image from an input signal of said first memory means and an output signal of said second memory means; and a mixing circuit for mixing an output signal of said signal switching means and an output signal of said second interpolating means.