← Back to Patent Explorer
US5325463A Expired / Lapsed US ⏱️ 0.0 years remaining

IC card with built-in voice synthesizing function

Assignee: Sharp Corp
•
Filing: 1992-01-30
•
Granted: 1994-06-28
•
Expires: 2012-01-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An IC card with a built-in voice synthesizing function is provided which includes a solid-state memory containing vector-quantized coded data, a pattern generating means for generating patterns each composed of a prescribed number of digital data by repeatedly performing calculations using a recurrence equation with initial values given by coded data read out of the solid-state memory, a converter circuit for limiting the band of each pattern generated by the pattern generating means and converting into an analog voice signal, and a gain control circuit for adjusting the gain of the analog voice signal output from the converter circuit on the basis of gain data read out of the solid-state memory.

Inventors

  • 👤 Yasumoto Murata
  • 👤 Shuichi Yoshikawa
  • 👤 Yuji Nishiwaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:58
CPC Classifications
G; G10; G10L; G10L13/00; G10L13/02; G10L13/04; G10L13/047

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 72 words
An apparatus with a built-in voice synthesizing function, comprising: a solid-state memory containing vector-quantized coded data; a pattern generating means, connected to the solid state memory, for generating patterns by repeatedly calculating a recurrence equation using coded data read from the solid state memory, each pattern having a prescribed number of digital data; and a converter circuit for converting said patterns generated by the pattern generating means into an analog voice signal.
Claim 2
Independent Claim 72 words
An apparatus with a built-in voice synthesizing function, comprising: a solid-state memory containing vector-quantized coded data; a pattern generating means, connected to the solid state memory, for generating patterns by repeatedly calculating a recurrence equation using coded data read from the solid state memory, each pattern having a prescribed number of digital data; and a converter circuit for converting said patterns generated by the pattern generating means into an analog voice signal.
Claim 3
Dependent Claim 13 words
The apparatus of claim 1, wherein said apparatus is an integrated circuit card.
Claim 4
Dependent Claim 37 words
The apparatus of claim 1, further comprising a gain control circuit for adjusting the gain of the analog voice signal output from the converter circuit on the basis of gain data read out of the solid-state memory.
Claim 5
Dependent Claim 24 words
The apparatus according to claim 1, further comprising: an address counter for addressing the solid-state memory to permit access to the vector-quantized coded data.
Claim 6
Dependent Claim 15 words
The apparatus according to claim 1, wherein the converter circuit is a band limiting filter.
Claim 7
Dependent Claim 34 words
The apparatus according to claim 3, wherein the vector-quantized coded data includes compressed samples of speech and wherein a corresponding gain value is stored in the solid state memory for each compressed speech sample.
Claim 8
Dependent Claim 37 words
The apparatus according to claim 6, further comprising: a gain control circuit for adjusting the gain of the analog voice signal using the gain value corresponding to the compressed speech sample read from the solid state memory.
Claim 9
Dependent Claim 69 words
An integrated voice synthesis system, comprising: a random access semiconductor memory for storing seeds of coded voice data; a pseudo-random number generator for generating a pseudo-random pattern of data bits using a corresponding seed of coded voice data; means for limiting the bandwidth of each pattern generated by the pseudo-random number generator to produce an analog signal; and means for generating a synthesized voice signal using the analog signal.
Claim 10
Dependent Claim 69 words
An integrated voice synthesis system, comprising: a random access semiconductor memory for storing seeds of coded voice data; a pseudo-random number generator for generating a pseudo-random pattern of data bits using a corresponding seed of coded voice data; means for limiting the bandwidth of each pattern generated by the pseudo-random number generator to produce an analog signal; and means for generating a synthesized voice signal using the analog signal.
Claim 11
Dependent Claim 24 words
The integrated voice synthesis system according to claim 8, wherein the semiconductor memory stores associated gain data for each seed of coded voice data.
Claim 12
Dependent Claim 38 words
The integrated voice synthesis system according to claim 9, wherein the means for generating includes a gain control circuit for controlling the amplitude of the synthesized voice signal based on the gain data stored in the semiconductor memory.
Claim 13
Dependent Claim 67 words
The integrated voice synthesis system according to claim 10, wherein the gain control circuit includes: a register for storing and outputting in parallel multiple bits of gain data received from the memory, and a weighting circuit for weighting the analog signal received from the means for limiting based on bit values of the gain data and a weight associated with each bit location of the shift register.
Claim 14
Dependent Claim 79 words
The integrated voice synthesis system according to claim 8, wherein the means for limiting includes: a shift register for serially receiving the pseudo-random pattern of data bits; a bank of parallel resistors with each resistor connected at one end to a corresponding bit location of the shift register for converting the bit values into respective analog voltages; and an operational amplifier connected to other ends of the parallel resistors for summing the analog voltages to produce the analog signal.
Claim 15
Dependent Claim 25 words
The integrated voice synthesis system according to claim 8, wherein the pseudo-random number generator generates the pseudo-random pattern of data bits using an m-sequence method.
Claim 16
Dependent Claim 38 words
The integrated voice synthesis system according to claim 8, wherein the pseudo-random number generator generates the pattern of data bits in accordance with a recurrence equation and the seed is an initial value input to the recurrence equation.
Claim 17
Independent Claim 80 words
A method for coding and storing speech for use in a speech synthesis device, comprising: receiving a block of digitized speech samples; generating a number of pseudo-randomly generated multi-bit patterns, each pattern corresponding to an associated code having fewer bits than its corresponding pattern; comparing the block of speech samples to each pattern and selecting the patterns that most closely correlates with the block of speech samples; and storing in a semiconductor memory the code associated with the selected pattern.
Claim 18
Independent Claim 80 words
A method for coding and storing speech for use in a speech synthesis device, comprising: receiving a block of digitized speech samples; generating a number of pseudo-randomly generated multi-bit patterns, each pattern corresponding to an associated code having fewer bits than its corresponding pattern; comparing the block of speech samples to each pattern and selecting the patterns that most closely correlates with the block of speech samples; and storing in a semiconductor memory the code associated with the selected pattern.
Claim 19
Dependent Claim 47 words
The method according to claim 15, further comprising: adjusting a gain associated with the selected pattern to minimize a difference between the selected pattern and the block of speech samples, and storing the adjusted gain in the memory along with the code associated with the selected pattern.
Claim 20
Independent Claim 61 words
A method for synthesizing speech from encoded speech data stored in a semiconductor memory, comprising: sequentially addressing the semiconductor memory and retrieving encoded speech data; pseudo-randomly generating a multi-bit pattern based on the retrieved encoded speech data, wherein the pattern has a greater number of bits than the retrieved encoded speech data; and converting the pattern to an analog speech signal.
Claim 21
Independent Claim 61 words
A method for synthesizing speech from encoded speech data stored in a semiconductor memory, comprising: sequentially addressing the semiconductor memory and retrieving encoded speech data; pseudo-randomly generating a multi-bit pattern based on the retrieved encoded speech data, wherein the pattern has a greater number of bits than the retrieved encoded speech data; and converting the pattern to an analog speech signal.
Claim 22
Dependent Claim 32 words
The method according to claim 17, further comprising: adjusting a gain of the analog speech signal based on gain information stored in the semiconductor memory associated with the retrieved encoded speech data.

References Cited (Backward Citations)

US4354056A Cited
US4635211A Cited
FR2602893A1 Cited
EP0277276A1 Cited
US4926463A Cited
EP0488751A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-27 1997-12-27 1998-06-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-27 2001-12-27 2002-06-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-27 2005-12-27 2006-06-28 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag