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US5321989A Expired / Lapsed US ⏱️ 0.0 years remaining

Integratable capacitative pressure sensor and process for its manufacture

Assignee: Acacia Research Group LLC
•
Filing: 1991-02-09
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Granted: 1994-06-21
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Expires: 2011-02-09
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Abstract

Abstract A process for manufacturing an integratable capacitative pressure sensor includes the following steps, starting from a semiconductor substrate (1): application of a guard film (2), precipitation of a polycrystalline semiconductor film (4), doping the polycrystalline semiconductor film (4) and removal of the guard film (2) by etching; then insulating the semiconductor zone (7) from the semiconductor substrate (1), and applying an insulator film (8) on the insulated semiconductor zone (7). The pressure sensor product, which is compatible with CMOS circuits and has increased sensor accuracy, includes a semiconductor zone (7) insulated from the semiconductor substrate (1) and an insulator film (8) applied on the insulated semiconductor zone (7), the polycrystalline semiconductor film (4) being located on the insulator film (8) above the insulated semiconductor zone (7).

Inventors

  • 👤 Gunther Zimmer
  • 👤 Jorg Eichholz
  • 👤 Wilfried Mokwa
  • 👤 Michael Kandler
  • 👤 Yiannakis Manoli

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 21:20
CPC Classifications
G; G01; G01L; G01L9/00; G01L9/0041; G01L9/0072; G01L9/0073; G01L9/0042; G01L9/12; G01L9/125; Y; Y10; Y10T; Y10T29/00; Y10T29/43; Y10T29/435

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 156 words
A process for manufacturing an integratable capacitative pressure sensor comprising the following steps, starting from a semiconductor substrate: insulating a semiconductor zone (7) from the semiconductor substrate (1); applying an insulator film (8) on the insulated semiconductor zone (7); producing a spacer film (2), which determines a future pressure sensor cavity (3) and which is located above the semiconductor zone (7) of the semiconductor substrate (1); precipitating a polycrystalline semiconductor film (4) in such a way that this polycrystalline semiconductor film covers the spacer film (2) at least partially and that the polycrystalline semiconductor film (4) is located on the insulator film (8) above the insulated semiconductor zone (7) such that the polycrystalline semiconductor film (4) does not extend beyond the semiconductor zone (7) in the lateral direction thereof; doping the precipitated polycrystalline semiconductor film (4) at least within a diaphragm-like area located above the spacer film (2); and removing the spacer film (2) by etching.
Claim 2
Dependent Claim 156 words
A process for manufacturing an integratable capacitative pressure sensor comprising the following steps, starting from a semiconductor substrate: insulating a semiconductor zone (7) from the semiconductor substrate (1); applying an insulator film (8) on the insulated semiconductor zone (7); producing a spacer film (2), which determines a future pressure sensor cavity (3) and which is located above the semiconductor zone (7) of the semiconductor substrate (1); precipitating a polycrystalline semiconductor film (4) in such a way that this polycrystalline semiconductor film covers the spacer film (2) at least partially and that the polycrystalline semiconductor film (4) is located on the insulator film (8) above the insulated semiconductor zone (7) such that the polycrystalline semiconductor film (4) does not extend beyond the semiconductor zone (7) in the lateral direction thereof; doping the precipitated polycrystalline semiconductor film (4) at least within a diaphragm-like area located above the spacer film (2); and removing the spacer film (2) by etching.
Claim 3
Dependent Claim 39 words
A process according to claim 1, wherein the step of insulating the semiconductor zone (7) from the semiconductor substrate (1) includes the production of a pn-junction in said semiconductor substrate (1) by adequate doping of said semiconductor zone (7).
Claim 4
Dependent Claim 37 words
A process according to claim 1 wherein the step of insulating the semiconductor zone (7) includes the implantation of implantation substances suitable for insulation so as to produce a buried insulation film in said semiconductor substrate (1).
Claim 5
Dependent Claim 20 words
A process according to claim 3, wherein the implantation substances are selected from the group consisting of oxygen and nitrogen.
Claim 6
Dependent Claim 32 words
A process according to claim 3, further comprising the step of thermally annealing the semiconductor zone (7) defined by the buried insulation film, said step being carried out after the implantation step.
Claim 7
Dependent Claim 17 words
A process according to claim 1, wherein the insulator film (8) includes Si 3 N 4 .
Claim 8
Dependent Claim 31 words
A process according to claim 1, wherein the spacer film (2) is constructed such that it extends through the polycrystalline semiconductor film (4), thereby defining at least one etching passage (5).

References Cited (Backward Citations)

US4426673A Cited
US4432007A Cited
US4420790A Cited
DE3404262A1 Cited
US4628403A Cited
EP0230084A1 Cited
DE3723561A1 Cited
US4838088A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-06-20 1997-12-20 1998-06-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-06-20 2001-12-20 2002-06-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-06-20 2005-12-20 2006-06-21 $7700.00 Window Closed / Lapsed

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