High accuracy via formation for semiconductor devices

Claim 2

A process for forming a sloped contact during the formation of a semiconductor device comprising the following steps: a) forming a planar dielectric layer over a conductive layer; b) forming an etch resist layer over said dielectric layer thereby covering a portion of said dielectric layer and leaving a portion of said dielectric layer exposed; c) etching said exposed portion of said dielectric layer thereby forming a sidewall in said dielectric layer and an angle at a junction of said covered dielectric layer and said sidewall, said etching of said exposed portion of said dielectric layer exposing a portion of said conductive layer; d) removing said etch resist layer; e) facet etching a portion of said dielectric layer at said junction with an inert material to form a faceted edge, said faceted edge formed by the erosion of said dielectric by said inert material; f) redepositing said eroded dielectric onto said sidewall and onto a portion of said exposed conductive layer simultaneously with said step e) thereby covering said portion of said exposed conductive layer with said eroded dielectric and narrowing the contact thereby.

Claim 3

The process of claim 1 wherein said inert material is argon.

Claim 4

The process of claim 1 wherein said inert material is selected from the group consisting of krypton and xenon.

Claim 5

The process of claim 1 wherein said faceted edge forms an angle of between about 45° and 50° with said planar dielectric layer.

Claim 6

The process of claim 1 wherein said facet etch erodes between about 600Å and 800Å of said dielectric layer in a horizontal direction, and about 2400Å to about 3200Å of said dielectric layer in vertical direction.

Claim 7

The process of claim 1 wherein said inert material is argon, said faceted edge forms an angle of between about 45° and 50° with said planar dielectric layer, and wherein said facet etch erodes between about 600Å and 800Å of said dielectric layer in a horizontal direction, and about 2400Å to about 3200Å of said dielectric layer in a vertical direction.

Claim 8

The process of claim 6 wherein said etching step comprises an etcher having an RF power setting of between about 300-700 watts, a pressure of between about 10-30 millitorr, and an etchant delivery set at between about 30-70 standard cubic centimeters.

Claim 9

The method of claim 1 wherein step c) is an isotropic etch which forms a sloped sidewall in said dielectric layer.

Claim 10

A process for forming a sloped contact during the formation of a semiconductor memory device comprising the following steps: a) forming a planar oxide layer over a conductive layer; b) forming an etch resist layer over said oxide layer thereby covering a portion of said oxide layer and leaving a portion of said oxide layer exposed; c) etching said exposed portion of said oxide layer thereby forming a sidewall in said oxide layer and an angle at a junction of said covered oxide layer and said sidewall, said oxide removal exposing a portion of said conductive layer; d) removing said etch resist layer; e) facet etching a portion of said oxide layer at said junction with an inert material to form a faceted edge, said faceted edge formed by the erosion of said oxide by said inert material; f) redepositing said eroded oxide onto said sidewall and onto a portion of said exposed conductive layer simultaneously with said step e) thereby covering said portion of said exposed conductive layer with said eroded oxide and narrowing the contact thereby.

Claim 11

A process for forming a sloped contact during the formation of a semiconductor memory device comprising the following steps: a) forming a planar oxide layer over a conductive layer; b) forming an etch resist layer over said oxide layer thereby covering a portion of said oxide layer and leaving a portion of said oxide layer exposed; c) etching said exposed portion of said oxide layer thereby forming a sidewall in said oxide layer and an angle at a junction of said covered oxide layer and said sidewall, said oxide removal exposing a portion of said conductive layer; d) removing said etch resist layer; e) facet etching a portion of said oxide layer at said junction with an inert material to form a faceted edge, said faceted edge formed by the erosion of said oxide by said inert material; f) redepositing said eroded oxide onto said sidewall and onto a portion of said exposed conductive layer simultaneously with said step e) thereby covering said portion of said exposed conductive layer with said eroded oxide and narrowing the contact thereby.

Claim 12

The process of claim 9 wherein said inert material is argon.

Claim 13

The process of claim 9 wherein said inert material is selected from the group consisting of krypton and xenon.

Claim 14

The process of claim 9 wherein said faceted edge forms an angle of between about 45° and 50° with said planar oxide layer.

Claim 15

The process of claim 9 wherein said facet etch erodes between about 600Å and 800Å of said oxide layer in a horizontal direction, and about 2400Å to about 3200Å of said oxide layer in vertical direction.

Claim 16

The process of claim 9 wherein said inert material is argon, said faceted edge forms an angle of between about 45° and 50° with said planar oxide layer, and wherein said facet etch erodes between about 600521 and 800Å of said oxide layer in a horizontal direction, and about 2400Å to about 3200Å of said oxide layer in a vertical direction.

Claim 17

The process of claim 14 wherein said etching step comprises an etcher having an RF power setting of between about 300-700 watts, a pressure of between about 10-30 millitorr, and an etchant delivery set at between about 30-70 standard cubic centimeters.

Claim 18

A process for forming a sloped contact during the formation of a semiconductor device comprising the following steps: a) forming a planar oxide layer over an aluminum layer; b) forming a photoresist layer over said oxide layer thereby covering a portion of said oxide layer and leaving a portion of said oxide layer exposed; c) etching said exposed portion of said oxide layer thereby forming a sidewall in said oxide layer and an angle at a junction of said covered oxide layer and said sidewall, said oxide removal exposing a portion of said aluminum layer; d) removing said photoresist layer; e) facet etching a portion of said oxide layer at said junction with an etchant to form a faceted edge and a redeposited layer, said faceted edge formed by the erosion of said oxide by said etchant and said redeposited layer formed by the redeposition of said eroded oxide onto said sidewall; f) redepositing said eroded oxide onto said sidewall and onto a portion of said exposed aluminum layer simultaneously with said step e) thereby covering said portion of said exposed conductive layer with said eroded oxide and narrowing the contact thereby; g) forming a conductive layer over said oxide to contact said aluminum layer.

Claim 19

A process for forming a sloped contact during the formation of a semiconductor device comprising the following steps: a) forming a planar oxide layer over an aluminum layer; b) forming a photoresist layer over said oxide layer thereby covering a portion of said oxide layer and leaving a portion of said oxide layer exposed; c) etching said exposed portion of said oxide layer thereby forming a sidewall in said oxide layer and an angle at a junction of said covered oxide layer and said sidewall, said oxide removal exposing a portion of said aluminum layer; d) removing said photoresist layer; e) facet etching a portion of said oxide layer at said junction with an etchant to form a faceted edge and a redeposited layer, said faceted edge formed by the erosion of said oxide by said etchant and said redeposited layer formed by the redeposition of said eroded oxide onto said sidewall; f) redepositing said eroded oxide onto said sidewall and onto a portion of said exposed aluminum layer simultaneously with said step e) thereby covering said portion of said exposed conductive layer with said eroded oxide and narrowing the contact thereby; g) forming a conductive layer over said oxide to contact said aluminum layer.

Claim 20

The process of claim 16 wherein said etchant comprises the use of argon.

Claim 21

The process of claim 16 wherein said etchant comprises the use of a material selected from the group consisting of krypton and xenon.

Claim 22

The process of claim 16 wherein said facet etch erodes between about 600Å and 800Å of said oxide layer in a horizontal direction, and about 2400Å to about 3200Å of said oxide layer in vertical direction.

Claim 23

The process of claim 16 wherein said inert material is argon, said faceted edge forms an angle of between about 45° and 50° with said planar oxide layer, and wherein said facet etch erodes between about 600Å and 800Å of said oxide layer in a horizontal direction, and about 2400Å to about 3200Å of said oxide layer in a vertical direction.

Claim 24

The process of claim 16 wherein said etching step comprises an etcher having an RF power setting of between about 300-700 watts, a pressure of between about 10-30 millitorr, and an etchant delivery set at between about 30-70 standard cubic centimeters.