US5317801A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacture of multilayer circuit board
Assignee: Nippon Mektron KK
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Filing: 1993-01-29
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Granted: 1994-06-07
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Expires: 2013-01-29
Abstract
Abstract A method for the manufacture of a multilayer printed circuit board on which integrated circuit chips may be directly mounted includes producing holes at predetermined locations to enable electrical connections between a chip and conductive layers of the circuit board to be established via the holes. Electrically conductive bump members, which protrude outwardly from the circuit board, are formed in registration with the holes. The bump members cooperate with an electrically conductive plating layer or filler that is deposited so as to be in intimate contact with a conductive layer(s) exposed during the production of each hole.
Inventors
- 👤 Yasuyuki Tanaka
- 👤 Chikafumi Oomachi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 16:32
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/099; H05; H05K; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K1/112; H05K1/113; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K3/40; H05K3/4007; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W90/00; H10W90/701; H05K1/03; H05K1/0393; H05K2201/00; H05K2201/03; H05K2201/0302; H05K2201/0305; H05K2201/0332; H05K2201/0388; H05K2201/0394; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09436; H05K2201/09472; H05K2201/095; H05K2201/09509; H05K2201/09818; H05K2201/09845; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10734; H05K2203/00; H05K2203/04; H05K2203/043; H05K3/4038; H05K3/4053; H05K3/4069; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/20; H10W72/221; H10W72/227; H10W72/241; H10W72/242; H10W72/251; H10W72/281; H10W72/287; H10W72/29; H10W72/90; H10W72/921; H10W72/926; H10W72/931; H10W72/934; H10W72/941; H10W72/9415; H10W74/00; H10W74/10; H10W74/131; H10W74/147; H10W90/721; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49155; Y10T29/49165
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
163 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; boring holes for conduction in inner and outer conductive circuit layers at portions where these conductive layers are to be connected together, the holes for conduction having diameters that gradually increase; laminating the inner and outer conductive circuit layers one upon another via insulating base members and joining them together; boring stepped holes by removing the insulating base members from portions where the conductive layers are to be electrically connected to each other in a manner that the conductive layers are exposed stepwisely; patterning said outer conductive circuit layers to form a required circuit wiring after an interlayer conductive members has been formed in said stepped holes; and forming electrically conductive bump members for connection to IC pads on the interlayer conductive members so as to outwardly protrude from the circuit board.
Claim 2
Independent Claim
163 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; boring holes for conduction in inner and outer conductive circuit layers at portions where these conductive layers are to be connected together, the holes for conduction having diameters that gradually increase; laminating the inner and outer conductive circuit layers one upon another via insulating base members and joining them together; boring stepped holes by removing the insulating base members from portions where the conductive layers are to be electrically connected to each other in a manner that the conductive layers are exposed stepwisely; patterning said outer conductive circuit layers to form a required circuit wiring after an interlayer conductive members has been formed in said stepped holes; and forming electrically conductive bump members for connection to IC pads on the interlayer conductive members so as to outwardly protrude from the circuit board.
Claim 3
Dependent Claim
37 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 1, wherein the step of removing the insulating base members is carried out by using chemical resin etching means or excimer laser means.
Claim 4
Dependent Claim
43 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 1; wherein the step of forming said interlayer conductive members consists of a step of forming electrically conductive bump seats that are electrically connected to said conductive bump members.
Claim 5
Dependent Claim
35 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 3, wherein said electrically conductive bump seats are formed stepwisely by the plating means that is effected for said stepped holes.
Claim 6
Dependent Claim
26 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 4, wherein said plating means includes at least a electroless plating method.
Claim 7
Dependent Claim
33 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 3, wherein said electrically conductive bump seats are formed by filling said stepped holes with an electrically conductive material.
Claim 8
Dependent Claim
26 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 1, wherein said electrically conductive bump members are formed by solder plating.
Claim 9
Dependent Claim
43 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 7, wherein said electrically conductive bump members formed by sodler plating are subjected to a reflow processing in order to semi-spherically form portions that protrudes from the circuit board.
Claim 10
Independent Claim
168 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; boring holes for conduction in said inner and outer conductive circuit layers at portions where these conductive layers are to be connected together, the holes for conduction having diameters that gradually increase; laminating the inner and outer conductive circuit layers one upon another via insulating base members and joining them together; boring stepped holes by removing the insulating base members from portions where the conductive layers are to be electrically connected to each other in a manner that the conductive layers are exposed stepwisely; effecting solder plating on said stepped holes in order to electrically connect said conductive layers to each other, parts of the solder-plated members outwardly protruding from the circuit board thereby to form electrically conductive bump members for connection to IC pads; and subjecting said outer conductive circuit layers to predetermined circuit wiring patterning.
Claim 11
Independent Claim
168 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; boring holes for conduction in said inner and outer conductive circuit layers at portions where these conductive layers are to be connected together, the holes for conduction having diameters that gradually increase; laminating the inner and outer conductive circuit layers one upon another via insulating base members and joining them together; boring stepped holes by removing the insulating base members from portions where the conductive layers are to be electrically connected to each other in a manner that the conductive layers are exposed stepwisely; effecting solder plating on said stepped holes in order to electrically connect said conductive layers to each other, parts of the solder-plated members outwardly protruding from the circuit board thereby to form electrically conductive bump members for connection to IC pads; and subjecting said outer conductive circuit layers to predetermined circuit wiring patterning.
Claim 12
Dependent Claim
37 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 9, wherein the step of removing said insulating base members is carried out by using chemical resin etching means or excimer laser means.
Claim 13
Dependent Claim
43 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 9, wherein said electrically conductive bump members formed by solder plating is subjected to a reflow processing in order to semi-spherically form portions that protrude from the circuit board.
Claim 14
Independent Claim
167 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; removing the conductive circuit layers from portions where electric connection is to be made to a particular conductive circuit layer among said inner and outer conductive circuit layers in a size that does not affect the electric conduction; laminating said inner and outer conductive circuit layers one upon another via insulating base members and joining them together; removing said insulating base members from the portions where the electric connection is to be made thereby to form holes for conduction in which said particular conductive circuit layer is exposed; forming an electrically conductive members in said hole followed by a predetermined circuit wiring patterning treatment for said outer conductive circuit layer; and forming electrically conductive bump members for connection to IC pads on said interlayer conductive members in a manner to protrude outwardly from the circuit board.
Claim 15
Independent Claim
167 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming required circuit wiring patterns on the inner conductive circuit layers except outer conductive circuit layers; removing the conductive circuit layers from portions where electric connection is to be made to a particular conductive circuit layer among said inner and outer conductive circuit layers in a size that does not affect the electric conduction; laminating said inner and outer conductive circuit layers one upon another via insulating base members and joining them together; removing said insulating base members from the portions where the electric connection is to be made thereby to form holes for conduction in which said particular conductive circuit layer is exposed; forming an electrically conductive members in said hole followed by a predetermined circuit wiring patterning treatment for said outer conductive circuit layer; and forming electrically conductive bump members for connection to IC pads on said interlayer conductive members in a manner to protrude outwardly from the circuit board.
Claim 16
Independent Claim
172 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming a required circuit wiring pattern on the inner conductive circuit layers except outer conductive circuit layers; removing the conductive circuit layers from portions where electric connection is to be made to a particular conductive circuit layer among said inner and outer conductive circuit layers in a size that does not affect the electric conduction; laminating said inner and outer conductive circuit layers one upon another via insulating base members and joining them together; removing said insulating base members from the portions where the electric connection is to be made thereby to form holes for connection in which said particular conductive circuit layer is exposed; effecting solder plating for said holes so that part of the solder-plating material electrically connected to said particular conductive circuit layer protrudes outwardly from the circuit board to form electrically conductive bump members for connection to IC pads; and subjecting said outer conductive circuit layer to a predetermined circuit wiring patterning treatment.
Claim 17
Independent Claim
172 words
A method of manufacturing a multilayer circuit board for mounting ICs comprising the steps of: forming a required circuit wiring pattern on the inner conductive circuit layers except outer conductive circuit layers; removing the conductive circuit layers from portions where electric connection is to be made to a particular conductive circuit layer among said inner and outer conductive circuit layers in a size that does not affect the electric conduction; laminating said inner and outer conductive circuit layers one upon another via insulating base members and joining them together; removing said insulating base members from the portions where the electric connection is to be made thereby to form holes for connection in which said particular conductive circuit layer is exposed; effecting solder plating for said holes so that part of the solder-plating material electrically connected to said particular conductive circuit layer protrudes outwardly from the circuit board to form electrically conductive bump members for connection to IC pads; and subjecting said outer conductive circuit layer to a predetermined circuit wiring patterning treatment.
Claim 18
Dependent Claim
37 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 12, wherein the step of removing the insulating base members is carried out by using chemical resin etching means or excimer laser means.
Claim 19
Dependent Claim
43 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 12, wherein the step of forming said conductive members consists of a step of forming electrically conductive bump seats that are electrically connected to said electrically conductive bump members.
Claim 20
Dependent Claim
36 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 15, wherein said electrically conductive bump seats are formed stepwisely by the plating means that is effected for said holes for conduction.
Claim 21
Dependent Claim
26 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 16, wherein said plating means includes at least a electroless plating method.
Claim 22
Dependent Claim
33 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 19, wherein said electrically conductive bump seats are formed by filling said holes for conduction an electrically conductive material.
Claim 23
Dependent Claim
26 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 12, wherein said electrically conductive bump members are formed by solder plating.
Claim 24
Dependent Claim
43 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 13, wherein said electrically conductive bump members formed by solder plating is subjected to a reflow processing in order to semi-spherically form portions that protrude from the circuit board.
Claim 25
Dependent Claim
37 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 13 wherein the step of removing the insulating base members is carried out by using chemical resin etching means or excimer laser means.
Claim 26
Dependent Claim
26 words
A method of manufacturing a multilayer circuit board for mounting ICs according to claim 21, wherein said electrically conductive bump members are formed by solder plating.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-06-06 | 1997-12-06 | 1998-06-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-06-06 | 2001-12-06 | 2002-06-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-06-06 | 2005-12-06 | 2006-06-07 | $7700.00 | Window Closed / Lapsed |