US5317333A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Graphics data processing apparatus with draw and advance operation
Assignee: Texas Instruments Inc
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Filing: 1992-07-17
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Granted: 1994-05-31
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Expires: 2012-07-17
Abstract
Abstract The graphics data processor of the present invention offers as a single instruction in its instruction set a draw and advance operation. A first data register stores a set of X and Y coordinates. In a first embodiment, a predetermined color code is stored at the pixel address of a bit mapped display memory indicated by the X and Y coordinates the first data register upon execution of the the draw and advance instruction. The X and Y coordinates stored in the first data register are then advanced by addition of X and Y coordinates stored in a second data register. A second embodiment is similar except that the color code stored at the X and Y coordinates of the first date register is recalled for combining with the predetermined color code and the combined result stored at that pixel location. The predetermined color code is preferrably stored in another data register. By proper selection of the X and Y coordinate data stored in the second data register either the X or the Y coordinate may be altered alone or both may be simultaneously changed. Provision of signed X and Y coordinate values in the second register enables either the X or Y coordinate to be incremented of decremented. This instruction serves to inhance the speed at which a line or computed curve may by drawn in the bit mapped display.
Inventors
- 👤 Karl M. Guttag
- 👤 Michael D. Asal
- 👤 Jerry R. Van Aken
- 👤 Neil Tebbutt
- 👤 Mark F. Novak
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:46
CPC Classifications
G; G06; G06T; G06T1/00; G06T1/20; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/393; G09G2340/00; G09G2340/10
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
169 words
A graphics data processing apparatus comprising: a display memory for storing a displayable image arranged in an array of pixels, the pixels addressable by X and Y coordinates, each pixel represented by a digital code; a first register for storing a first data word representing X and Y coordinates; a second register memory for storing a second data word representing X and Y coordinates; and a processing unit connected to the display memory and the first and second registers, the processing unit including writing means for writing a digital code in the pixel location of the display memory designated by the X and Y coordinates of the first data word, and storing means for storing in the first register a data word representing an X coordinate calculated from the X coordinate of the first data word and the X coordinate of the second data word and having a Y coordinate calculated from the Y coordinate of the first data word and the Y coordinate of the second data word.
Claim 2
Dependent Claim
169 words
A graphics data processing apparatus comprising: a display memory for storing a displayable image arranged in an array of pixels, the pixels addressable by X and Y coordinates, each pixel represented by a digital code; a first register for storing a first data word representing X and Y coordinates; a second register memory for storing a second data word representing X and Y coordinates; and a processing unit connected to the display memory and the first and second registers, the processing unit including writing means for writing a digital code in the pixel location of the display memory designated by the X and Y coordinates of the first data word, and storing means for storing in the first register a data word representing an X coordinate calculated from the X coordinate of the first data word and the X coordinate of the second data word and having a Y coordinate calculated from the Y coordinate of the first data word and the Y coordinate of the second data word.
Claim 3
Dependent Claim
42 words
The graphics data processing apparatus of claim 1 including: a visual display connected to the display memory for generating a visually perceivable representation of the displayable image stored in the display memory, and the digital code for each pixel represents a color.
Claim 4
Dependent Claim
45 words
The graphics data processing apparatus of claim 1 in which: the first and second data words stored in the first and second registers include M bits, the most significant M/2 bits representing the Y coordinate and the least significant M/2 bits representing the X coordinate.
Claim 5
Dependent Claim
26 words
The graphics data processing apparatus of claim 1 including: a digital code register connected to the writing means for storing the digital code to be written.
Claim 6
Dependent Claim
144 words
The graphics data processing apparatus of claim 1 in which: the storing means includes an arithmetic logic unit connected to the first and second register memories for performing a selected arithmetic operation upon the X coordinate stored in the first register and the X coordinate stored in the second register, for performing a selected arithmetic operation upon the Y coordinate stored in the first register and the Y coordinate stored in the second register, and for storing the result of the arithmetic operations in the first register; and the writing means includes a graphics logic unit connected to the display memory and the first register for writing the digital code at the location of the pixel of the display memory designated by the X and Y coordinates of the first data word, the graphics logic unit operating in parallel with the arithmetic logic unit.
Claim 7
Dependent Claim
202 words
A graphics data processing apparatus comprising: a display memory for storing a displayable image arranged in an array of pixels, the pixels addressable by X and Y coordinates, each pixel represented by a digital code; a first register for storing a first data word representing X and Y coordinates; a second register for storing a second data word representing X and Y coordinates; a first arithmetic logic unit, connected to the display memory and the first and second registers, for reading a first digital code of the pixel in the display memory designated by the X and Y coordinates stored in the first register, for combining the first digital code with a second digital code according to a selected operation, and for writing a third digital code resulting from the combining into the display memory at the pixel location designated by the X and Y coordinates stored in the first register; and a second arithmetic logic unit for calculating a third data word having an X coordinate calculated according to a selected operation upon the X coordinate stored in the first register and the X coordinate stored in the second register, and for storing the third data word in the first register.
Claim 8
Dependent Claim
202 words
A graphics data processing apparatus comprising: a display memory for storing a displayable image arranged in an array of pixels, the pixels addressable by X and Y coordinates, each pixel represented by a digital code; a first register for storing a first data word representing X and Y coordinates; a second register for storing a second data word representing X and Y coordinates; a first arithmetic logic unit, connected to the display memory and the first and second registers, for reading a first digital code of the pixel in the display memory designated by the X and Y coordinates stored in the first register, for combining the first digital code with a second digital code according to a selected operation, and for writing a third digital code resulting from the combining into the display memory at the pixel location designated by the X and Y coordinates stored in the first register; and a second arithmetic logic unit for calculating a third data word having an X coordinate calculated according to a selected operation upon the X coordinate stored in the first register and the X coordinate stored in the second register, and for storing the third data word in the first register.
Claim 9
Dependent Claim
40 words
The graphics data processing apparatus of claim 6 including: a visual display connected to the display memory for generating a visually perceivable representation of the image stored in the display memory, the digital code for each pixel represents a color.
Claim 10
Dependent Claim
45 words
The graphics data processing apparatus of claim 6 in which the first and second data words stored in the first and second registers include M bits, the most significant M/2 bits representing the Y coordinate and the least significant M/2 bits representing the X coordinate.
Claim 11
Dependent Claim
26 words
The graphics data processing apparatus of claim 6 including: a digital code register connected to the first arithmetic logic unit for storing the second digital code.
Claim 12
Dependent Claim
39 words
The graphics data processing apparatus of claim 6 in which: the selected operation of the first arithmetic logic unit is a logical combination of each of the individual bits of the first digital code and the second digital code.
Claim 13
Dependent Claim
24 words
The graphics data processing apparatus of claim 9 in which: the selected operation of the first arithmetic logic unit is a logical AND combination.
Claim 14
Dependent Claim
24 words
The graphics data processing apparatus of claim 9 in which: the selected operation of the first arithmetic logic unit is a logical OR combination.
Claim 15
Dependent Claim
37 words
The graphics data processing apparatus of claim 6 in which: the selected operation of the first arithmetic logic unit is an arithmetic combination of the numbers represented by the first digital code and the second digital code.
Claim 16
Dependent Claim
22 words
The graphics data processing apparatus of claim 13 in which: the selected operation of the first arithmetic logic unit is an addition.
Claim 17
Dependent Claim
22 words
The graphics data processing apparatus of claim 13 in which: the selected operation of the first arithmetic logic unit is a subtraction.
Claim 18
Dependent Claim
24 words
The graphics data processing apparatus of claim 6 in which: the first arithmetic logic unit and the second arithmetic logic unit operate in parallel.
Claim 19
Dependent Claim
190 words
A graphics data processing apparatus comprising: a memory interface for transmission of address, data, a read control signal, and a write control signal; a first register for storing a first data word representing X and Y coordinates of a memory address: a second register for storing a second data word representing X and Y coordinates of a memory address; a processor connected to the memory interface and the first and second registers, the processor including: applying means for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register, a digital code and the write control signal to write the digital code to an external memory in the pixel location designated by the X and Y coordinates stored in the first register; and storing means for storing in the first register a data word representing an X coordinate formed from the X coordinate stored in the first register and the X coordinate stored in the second register, and representing a Y coordinate formed from the Y coordinate stored in the first register and the Y coordinate stored in the second register.
Claim 20
Dependent Claim
190 words
A graphics data processing apparatus comprising: a memory interface for transmission of address, data, a read control signal, and a write control signal; a first register for storing a first data word representing X and Y coordinates of a memory address: a second register for storing a second data word representing X and Y coordinates of a memory address; a processor connected to the memory interface and the first and second registers, the processor including: applying means for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register, a digital code and the write control signal to write the digital code to an external memory in the pixel location designated by the X and Y coordinates stored in the first register; and storing means for storing in the first register a data word representing an X coordinate formed from the X coordinate stored in the first register and the X coordinate stored in the second register, and representing a Y coordinate formed from the Y coordinate stored in the first register and the Y coordinate stored in the second register.
Claim 21
Dependent Claim
45 words
The graphics data processing apparatus of claim 17 in which: the first and second data words stored in the first and second registers include M bits, the most significant M/2 bits representing the Y coordinate and the least significant M/2 bits representing the X coordinate.
Claim 22
Dependent Claim
23 words
The graphics data processing apparatus of claim 17 including: a digital code register connected to the applying means for storing the digital code.
Claim 23
Dependent Claim
171 words
The graphics data processing apparatus of claim 17 in which: the storing means includes an arithmetic logic unit connected to the first and second registers for performing a selected arithmetic operation upon the X coordinate stored in the first register and the X coordinate stored in the second register, for performing a selected arithmetic operation upon the Y coordinate stored in the first register and the Y coordinate stored in the second register, and for storing the result of the arithmetic operations in the first register; and the applying means includes a graphics logic unit connected to the memory interface and the first register for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register memory, the digital code and the write control signal to write the digital code to an external memory in the pixel location designated by the X and Y coordinates of the first data word, the arithmetic logic unit and the graphics logic unit operating in parallel.
Claim 24
Dependent Claim
279 words
A graphics data processing apparatus comprising: a memory interface for transmission of address, data, a read control signal and a write control signal to an external memory; a first register for storing a first data word representing X and Y coordinates of a memory address; a second register for storing a second data word representing X and Y coordinates of a memory address; a first arithmetic logic unit, connected to the memory interface and the first and second registers, for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register and the read control signal to read a first digital code stored in the external memory at a pixel location designated by the X and Y coordinates stored in the first register, for combining the first digital code with a second digital code according to a selected operation to form a combined digital code, and for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register, the combined digital code and the write control signal to write the combined digital code to the external memory in the pixel location designated by the X and Y coordinates stored in the first register; and a second arithmetic logic unit for calculating a data word having an X coordinate calculated according to a selected operation upon the X coordinate stored in the first register and the X coordinate stored in the second register and having a Y coordinate calculated according to a selected operation upon the Y coordinate stored in the first register and the Y coordinate stored in the second register.
Claim 25
Dependent Claim
279 words
A graphics data processing apparatus comprising: a memory interface for transmission of address, data, a read control signal and a write control signal to an external memory; a first register for storing a first data word representing X and Y coordinates of a memory address; a second register for storing a second data word representing X and Y coordinates of a memory address; a first arithmetic logic unit, connected to the memory interface and the first and second registers, for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register and the read control signal to read a first digital code stored in the external memory at a pixel location designated by the X and Y coordinates stored in the first register, for combining the first digital code with a second digital code according to a selected operation to form a combined digital code, and for applying to the memory interface a memory address corresponding to the X and Y coordinates stored in the first register, the combined digital code and the write control signal to write the combined digital code to the external memory in the pixel location designated by the X and Y coordinates stored in the first register; and a second arithmetic logic unit for calculating a data word having an X coordinate calculated according to a selected operation upon the X coordinate stored in the first register and the X coordinate stored in the second register and having a Y coordinate calculated according to a selected operation upon the Y coordinate stored in the first register and the Y coordinate stored in the second register.
Claim 26
Dependent Claim
46 words
The graphics data processing apparatus of claim 21 in which: the first and second data words stored in the first and second register memories include M bits, the most significant M/2 bits representing the Y coordinate and the least significant M/2 bits representing the X coordinate.
Claim 27
Dependent Claim
26 words
The graphics data processing apparatus of claim 21 including: a digital code register connected to the first arithmetic logic unit for storing the second digital code.
Claim 28
Dependent Claim
39 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is a logical combination of each of the individual bits of the first digital code and the second digital code.
Claim 29
Dependent Claim
24 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is a logical AND combination.
Claim 30
Dependent Claim
24 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is a logical OR combination.
Claim 31
Dependent Claim
37 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is an arithmetic combination of the numbers represented by the first digital code and the second digital code.
Claim 32
Dependent Claim
22 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is an addition.
Claim 33
Dependent Claim
22 words
The graphics data processing apparatus of claim 21 in which: the selected operation of the first arithmetic logic unit is a subtraction.
Claim 34
Dependent Claim
27 words
The graphics data processing apparatus of claim 27 in which: the first arithmetic logic unit and the second arithmetic logic unit are capable of operating in parallel.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-30 | 1997-11-29 | 1998-05-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-30 | 2001-11-29 | 2002-05-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-30 | 2005-11-29 | 2006-05-31 | $7700.00 | Window Closed / Lapsed |