US5317173A
Expired / Lapsed
US
⏱️ 0.0 years remaining
HBT differential pair chip for quasi-optic amplifiers
Assignee: Skyworks Solutions Inc
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Filing: 1993-05-13
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Granted: 1994-05-31
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Expires: 2013-05-13
Abstract
Abstract A monolithic integrated circuit provides RF and DC coupling for a unit cell of a high power quasi-optic grid amplifier. The monolithic chip includes two heterojunction bipolar transistors (HBTs) connected in a differential pair configuration with a common emitter and integrated collector-base and emitter bias resistors. Each of the plurality of unit cells comprising the quasi-optic grid amplifier includes an emitter-coupled HBT differential pair chip at the center, an input antenna that extends horizontally in both directions from the two base leads, an output antenna that extends vertically in both directions from the two collector leads, and high inductance bias lines for the emitter and collectors. The grid amplifier, which functions as a high frequency, high gain, wide bandwidth, free-space beam amplifier, comprises a plurality of unit cells arranged in a repeating pattern of input and output dipole antennas. For high frequency applications, the plurality of unit cells may be integrated on one surface of the monolithic chip.
Inventors
- 👤 Emilio A. Sovero
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 16:14
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H03; H03F; H03F3/00; H03F3/04; H03F3/08; H10D84/0123; H10D84/0126; H10D84/0158; H10D84/02; H10D84/05
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
82 words
A monolithic heterojunction bipolar transistor (HBT) differential pair chip, comprising: first and second HBTs fabricated on said chip, said HBTs having a common emitter; said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; and an emitter bias resistor connected to said common emitter.
Claim 2
Dependent Claim
82 words
A monolithic heterojunction bipolar transistor (HBT) differential pair chip, comprising: first and second HBTs fabricated on said chip, said HBTs having a common emitter; said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; and an emitter bias resistor connected to said common emitter.
Claim 3
Dependent Claim
19 words
The monolithic chip of claim 1, wherein said emitter bias resistor comprises a pair of parallel connected bias resistors.
Claim 4
Dependent Claim
22 words
The monolithic chip of claim 1, further comprising means for connecting said chip to form a unit cell of a quasi-optic amplifier.
Claim 5
Dependent Claim
51 words
The monolithic chip of claim 3, wherein said unit cell comprises an input antenna connected to said first and second bases, an output antenna and a high inductance collector bias line connected to said first and second collectors, and a high inductance emitter bias line connected to said emitter bias resistor.
Claim 6
Dependent Claim
33 words
The monolithic chip of claim 4, wherein said connecting means further comprises a via connecting said emitter bias resistor to said high inductance emitter bias line at the back side of said chip.
Claim 7
Dependent Claim
138 words
A monolithic heterojunction bipolar transistor (HBT) differential pair chip for a unit cell of a quasi-optic amplifier, comprising: first and second HBTs fabricated on said chip, said HBTs having a common emitter, said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; an emitter bias resistor connected to said common emitter; said first and second bases connected to an input antenna of said amplifier; said first and second collectors connected to an output antenna of said amplifier; a high inductance collector bias line connected to said collectors; and a high inductance emitter bias line connected to said emitter bias resistor.
Claim 8
Dependent Claim
138 words
A monolithic heterojunction bipolar transistor (HBT) differential pair chip for a unit cell of a quasi-optic amplifier, comprising: first and second HBTs fabricated on said chip, said HBTs having a common emitter, said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; an emitter bias resistor connected to said common emitter; said first and second bases connected to an input antenna of said amplifier; said first and second collectors connected to an output antenna of said amplifier; a high inductance collector bias line connected to said collectors; and a high inductance emitter bias line connected to said emitter bias resistor.
Claim 9
Dependent Claim
20 words
The monolithic HBT chip of claim 6, wherein said emitter bias resistor comprises a pair of parallel connected bias resistors.
Claim 10
Dependent Claim
30 words
The monolithic HBT chip of claim 6, further comprising a via connecting said emitter bias resistor to said high inductance emitter bias line at the back side of said chip.
Claim 11
Dependent Claim
37 words
The monolithic HBT chip of claim 6, wherein said chip includes said HBT differential pair, said input and output antennas, said collector bias line, and said emitter bias line integrated on one surface of said monolithic chip.
Claim 12
Dependent Claim
148 words
A quasi-optic grid amplifier having a plurality of unit cells, each of said unit cells comprising: first and second heterojunction bipolar transistors (HBTs) fabricated on a monolithic chip, said HBTs connected in a differential pair configuration with a common emitter; said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; an emitter bias resistor connected to said common emitter; said first and second bases connected to an input antenna of said grid amplifier; said first and second collectors connected to an output antenna of said grid amplifier; a high inductance collector bias line connected to said collectors; and a high inductance emitter bias line connected to said emitter bias resistor.
Claim 13
Dependent Claim
148 words
A quasi-optic grid amplifier having a plurality of unit cells, each of said unit cells comprising: first and second heterojunction bipolar transistors (HBTs) fabricated on a monolithic chip, said HBTs connected in a differential pair configuration with a common emitter; said first HBT further comprising a first collector, a first base, and a first bias resistor connecting said first collector and said first base; said second HBT further comprising a second collector, a second base, and a second bias resistor connecting said second collector and said second base; an emitter bias resistor connected to said common emitter; said first and second bases connected to an input antenna of said grid amplifier; said first and second collectors connected to an output antenna of said grid amplifier; a high inductance collector bias line connected to said collectors; and a high inductance emitter bias line connected to said emitter bias resistor.
Claim 14
Dependent Claim
20 words
The quasi-optic grid amplifier of claim 10, wherein said emitter bias resistor comprises a pair of parallel connected bias resistors.
Claim 15
Dependent Claim
30 words
The quasi-optic grid amplifier of claim 10, further comprising a via connecting said emitter bias resistor to said high inductance emitter bias line at the back side of said chip.
Claim 16
Dependent Claim
22 words
The quasi-optic grid amplifier of claim 10, wherein said plurality of unit cells are integrated on one surface of said monolithic chip.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-30 | 1997-11-29 | 1998-05-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-30 | 2001-11-29 | 2002-05-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-30 | 2005-11-29 | 2006-05-31 | $7700.00 | Window Closed / Lapsed |