Abstract Apparatus for indicating the end of an acquisition procedure between a transmitter and receiver in a direct sequence spread spectrum communications system. A transmitter generates a first acquisition code having a first acquisition code period and comprised of digital bits at a first bit rate. A circuit modulates the first digital acquisition code by a pseudo-noise code repeating at a pseudo-noise code period and consisting of a sequence of chips at a chip rate greater than the first bit rate. The first acquisition code period is an integer multiple of the pseudo-noise code period. A circuit modulates a carrier by the first digital acquisition code modulated by the pseudo-noise code. The carrier modulated by said first digital acquisition code modulated by said pseudo-noise code is transmitted for a first period of time. A circuit synchronizes a receiver to the chip rate and carrier frequency. A circuit synchronizes the receiver to the pseudo-noise code period. A circuit synchronizes the receiver to the period of the data bit rate. A circuit synchronizes the receiver to the first acquisition code period. The transmitter generates a second acquisition code having a second acquisition code period and comprised of digital bits at a second bit rate, the second bit rate equal to the bit rate of the first acquisition code period. A circuit modulates the second digital acquisition code by the pseudo-noise code. A circuit modulates the carrier by the second digital acquisition code modulated by the pseudo-noise code. A circuit transmits for a second period of time equal to the second acquisition code period the carrier modulated by the second acquisition code modulated by the pseudo-noise code. A circuit synchronizes the receiver to the second acquisition code, the end of the second acquisition code indicates the end of the acquisition procedure.
Apparatus for indicating the end of an acquisition procedure between a transmitter and receiver in a direct sequence spread spectrum communications system, comprising: a transmitter; means for generating at said transmitter a first acquisition code having a first acquisition code period and comprised of digital bits at a first bit rate; means for modulating said first digital acquisition code by a pseudo-noise code repeating at a pseudo-noise code period and consisting of a sequence of chips at a chip rate greater than said first bit rate, and wherein said first acquisition code period is an integer multiple of said pseudo-noise code period; means for modulating a carrier by said first digital acquisition code modulated by said pseudo-noise code; means for transmitting for a first period of time, said carrier modulated by said first digital acquisition code modulated by said pseudo-noise code; a receiver; means for synchronizing a receiver to said chip rate and carrier frequency; means for synchronizing said receiver to said pseudo-noise code period; means for synchronizing said receiver to said period of said data bit rate; means for synchronizing said receiver to said first acquisition code period; means for generating at said transmitter a second acquisition code having a second acquisition code period and comprised of digital bits at a second bit rate, said second bit rate equal to the bit rate of said first acquisition code period; means for modulating said second digital acquisition code by said pseudo-noise code; means for modulating said carrier by said second digital acquisition code modulated by said pseudo-noise code; means for transmitting for a second period of time equal to said second acquisition code period said carrier modulated by said second acquisition code modulated by said pseudo-noise code; and means for synchronizing said receiver to said second acquisition code, the end of said second acquisition code indicating the end of said acquisition procedure.
Claim 2
Dependent Claim
312 words
Apparatus for indicating the end of an acquisition procedure between a transmitter and receiver in a direct sequence spread spectrum communications system, comprising: a transmitter; means for generating at said transmitter a first acquisition code having a first acquisition code period and comprised of digital bits at a first bit rate; means for modulating said first digital acquisition code by a pseudo-noise code repeating at a pseudo-noise code period and consisting of a sequence of chips at a chip rate greater than said first bit rate, and wherein said first acquisition code period is an integer multiple of said pseudo-noise code period; means for modulating a carrier by said first digital acquisition code modulated by said pseudo-noise code; means for transmitting for a first period of time, said carrier modulated by said first digital acquisition code modulated by said pseudo-noise code; a receiver; means for synchronizing a receiver to said chip rate and carrier frequency; means for synchronizing said receiver to said pseudo-noise code period; means for synchronizing said receiver to said period of said data bit rate; means for synchronizing said receiver to said first acquisition code period; means for generating at said transmitter a second acquisition code having a second acquisition code period and comprised of digital bits at a second bit rate, said second bit rate equal to the bit rate of said first acquisition code period; means for modulating said second digital acquisition code by said pseudo-noise code; means for modulating said carrier by said second digital acquisition code modulated by said pseudo-noise code; means for transmitting for a second period of time equal to said second acquisition code period said carrier modulated by said second acquisition code modulated by said pseudo-noise code; and means for synchronizing said receiver to said second acquisition code, the end of said second acquisition code indicating the end of said acquisition procedure.
Claim 3
Dependent Claim
25 words
The apparatus of claim 1 which further includes means for modulating digital data by a second pseudo-noise code upon the end of said acquisition procedure.