US5313398A
Expired / Lapsed
US
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Method and apparatus for simulating a microelectronic circuit
Assignee: Carnegie Mellon University
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Filing: 1992-07-23
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Granted: 1994-05-17
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Expires: 2012-07-23
Abstract
Abstract A method and apparatus for simulating a microelectronic circuit includes the steps of storing of a microelectronic circuit or system representation in a computer system and then dividing the circuit or system into portions containing nonlinear elements and linear partitions. The linear partitions are then independently solved for by modelling each linear partition using Asymptotic Waveform Evaluation (AWE) to form multiport admittance macromodels. These macromodels provide admittance and current stencils, which may be functions of time, to a global MNA matrix used by SPICE at each time point to simulate the operation of the entire microelectronic circuit. A linearized transient representation for the nonlinear elements is provided as SPICE admittance and current stencils using conventional techniques. By using AWE techniques to solve the linear partitions separately, significant savings in computation time and improved computational storage efficiency can be achieved.
Inventors
- 👤 Ronald A. Rohrer
- 👤 Vivek Raghavan
- 👤 J. Eric Bracken
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:15
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/36; G06F30/367
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
135 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the following steps performed in a computer system: storing a representation of said microelectronic circuit in said computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; determining moments for a portion of said first circuit; determining poles from the moments; forming a multiport macromodel of said portion of said first circuit from the poles; forming a linearized transient representation of said second circuit; and combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 2
Independent Claim
135 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the following steps performed in a computer system: storing a representation of said microelectronic circuit in said computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; determining moments for a portion of said first circuit; determining poles from the moments; forming a multiport macromodel of said portion of said first circuit from the poles; forming a linearized transient representation of said second circuit; and combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 3
Dependent Claim
39 words
The method of claim 1 wherein said combining step is followed by the steps of: modifying said microelectronic circuit in response to the time domain simulation of the operation of said microelectronic circuit; and manufacturing the modified microelectronic circuit.
Claim 4
Dependent Claim
98 words
The method of claim 1, wherein said macromodel forming step comprises the step of forming a multiport admittance macromodel of said portion of said first circuit from the poles; wherein the step of forming a linearized transient representation of said second circuit comprises the step of forming a linearized admittance representation of said second circuit; and wherein said combining step comprises the step of combining said multiport admittance macromodel and said linearized admittance representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 5
Dependent Claim
123 words
The method of claim 1, wherein said dividing step comprises the step of dividing the stored representation into a first circuit comprising a plurality of linear element partitions and a second circuit comprising nonlinear elements; wherein the step of determining moments comprises the step of determining moments for said plurality of linear element partitions; wherein the multiport macromodel forming step comprises the step of forming a plurality of multiport admittance macromodels of said plurality of linear element partitions; and wherein said combining step comprises the step of combining said plurality of multiport admittance macromodels and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 6
Dependent Claim
52 words
The method of claim 1, wherein the step of determining poles from the moments is followed by the step of determining residues from the moments and the poles; and wherein the step of forming a multiport macromodel comprises the step of forming a multiport admittance macromodel from the poles and the residues.
Claim 7
Dependent Claim
72 words
The method of claim 1, wherein said combining step is preceded by the step of forming a first stencil from said multiport macromodel and forming a second stencil from said linearized transient representation; and wherein said combining step comprises the step of combining said first and second stencils at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 8
Dependent Claim
192 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of linear and nonlinear interconnected electronic elements, said apparatus comprising, means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; moment determining means, responsive to said dividing means, for determining moments for a portion of said first circuit; pole determining means, responsive to said moment determining means, for determining poles from the moments; multiport macromodel forming means, responsive to said pole determining means, for forming a multiport macromodel of said portion of said first circuit from the poles; linearized transient representation means, responsive to said dividing means, for forming a linearized transient representation of said second circuit; simulation producing means, responsive to said macromodel forming means and said linearized transient representation means, for combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 9
Dependent Claim
192 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of linear and nonlinear interconnected electronic elements, said apparatus comprising, means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; moment determining means, responsive to said dividing means, for determining moments for a portion of said first circuit; pole determining means, responsive to said moment determining means, for determining poles from the moments; multiport macromodel forming means, responsive to said pole determining means, for forming a multiport macromodel of said portion of said first circuit from the poles; linearized transient representation means, responsive to said dividing means, for forming a linearized transient representation of said second circuit; simulation producing means, responsive to said macromodel forming means and said linearized transient representation means, for combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 10
Dependent Claim
46 words
The apparatus of claim 7, further comprising: means, responsive to said simulation producing means, for modifying said microelectronic circuit in response to the time domain simulation of the operation of said microelectronic circuit; and means, responsive to said modifying means, for manufacturing the modified microelectronic circuit.
Claim 11
Dependent Claim
117 words
The apparatus of claim 7, wherein said dividing means comprises means for dividing the stored representation into a first circuit comprising a plurality of linear element partitions and a second circuit; wherein said moment determining means comprises means for determining moments for said plurality of linear element partitions; wherein said multiport macromodel forming means comprises means for forming a plurality of multiport admittance macromodels of said plurality of linear element partitions from the poles; and wherein said simulation producing means comprises means for combining said multiport admittance macromodels and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 12
Dependent Claim
54 words
The apparatus of claim 7, further comprising residue determining means, responsive to said moment and said pole determining means, for determining residues from the moments and poles; and wherein said multiport macromodel forming means comprises means for forming a multiport admittance macromodel of said portion of said first circuit from the poles and residues.
Claim 13
Dependent Claim
65 words
The apparatus of claim 7, wherein said simulation producing means comprises: means for forming a first stencil from said multiport macromodel; means for forming a second stencil from said linearized transient representation; and means for combining said first and second stencils at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 14
Dependent Claim
161 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; asymptotic waveform evaluation means, responsive to said dividing means, for forming a multiport admittance macromodel of a portion of said first circuit; linearized transient representation means, responsive to said storing and dividing means, for forming a linearized transient representation of said second circuit; and simulation producing means, responsive to said asymptotic waveform evaluation means and said linearized transient representation means, for combining said multiport admittance macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 15
Dependent Claim
161 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; asymptotic waveform evaluation means, responsive to said dividing means, for forming a multiport admittance macromodel of a portion of said first circuit; linearized transient representation means, responsive to said storing and dividing means, for forming a linearized transient representation of said second circuit; and simulation producing means, responsive to said asymptotic waveform evaluation means and said linearized transient representation means, for combining said multiport admittance macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 16
Dependent Claim
46 words
The apparatus of claim 12, further comprising: means, responsive to said simulation producing means, for modifying said microelectronic circuit in response to the time domain simulation of the operation of said microelectronic circuit; and means, responsive to said modifying means, for manufacturing the modified microelectronic circuit.
Claim 17
Dependent Claim
99 words
The apparatus of claim 12, wherein said dividing means comprises means for dividing the stored representation into a first circuit comprising a plurality of linear element partitions and a second circuit; wherein said asymptotic waveform evaluation means comprises means for forming a plurality of multiport admittance macromodels of said plurality of linear element partitions; and wherein said simulation producing means comprises means for combining said plurality of multiport admittance macromodels and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 18
Dependent Claim
71 words
The apparatus of claim 12, further comprising means responsive to said asymptotic waveform evaluation means, for forming a first stencil from said multiport macromodel and for forming a second stencil from said linearized transient representation; and wherein said simulation producing means comprises means for combining said first and second stencils at each time point to produce the time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 19
Independent Claim
118 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the following steps performed in a computer system: storing a representation of said microelectronic circuit in said computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; forming a multiport macromodel of a portion of said first circuit; forming a linearized transient representation of said second circuit; and combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 20
Independent Claim
118 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the following steps performed in a computer system: storing a representation of said microelectronic circuit in said computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; forming a multiport macromodel of a portion of said first circuit; forming a linearized transient representation of said second circuit; and combining said multiport macromodel and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 21
Dependent Claim
39 words
The method of claim 16 wherein said combining step is followed by the steps of: modifying said microelectronic circuit in response to the time domain simulation of the operation of said microelectronic circuit; and manufacturing the modified microelectronic circuit.
Claim 22
Dependent Claim
95 words
The method of claim 16, wherein said macromodel forming step comprises the step of forming a multiport admittance macromodel of said portion of said first circuit; wherein the step of forming a linearized transient representation of said second circuit comprises the step of forming a linearized admittance representation of said second circuit; and wherein said combining step comprises the step of combining said multiport admittance macromodel and said linearized admittance representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 23
Dependent Claim
104 words
The method of claim 16, wherein said dividing step comprises the step of dividing the stored representation into a first circuit comprising a plurality of linear element partitions and a second circuit comprising nonlinear elements; wherein the multiport macromodel forming step comprises the step of forming a plurality of multiport admittance macromodels of said plurality of linear element partitions; and wherein said combining step comprises the step of combining said plurality of multiport admittance macromodels and said linearized transient representation at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 24
Dependent Claim
72 words
The method of claim 16, wherein said combining step is preceded by the step of forming a first stencil from said multiport macromodel and forming a second stencil from said linearized admittance representation; and wherein said combining step comprises the step of combining said first and second stencils at time points in the time interval to produce a time domain simulation of the operation of said microelectronic circuit during the time interval.
Claim 25
Dependent Claim
97 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: Asymptotic Waveform Evaluation (AWE) means, for producing a model of a portion of said linear electronic elements; means, responsive to said Asymptotic Waveform Evaluation means, for converting said model of said portion of linear electronic elements into a SPICE compatible representation; and SPICE means, responsive to said converting means, for producing a time domain simulation of said microelectronic circuit from said nonlinear electronic elements and said SPICE compatible representation.
Claim 26
Dependent Claim
97 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: Asymptotic Waveform Evaluation (AWE) means, for producing a model of a portion of said linear electronic elements; means, responsive to said Asymptotic Waveform Evaluation means, for converting said model of said portion of linear electronic elements into a SPICE compatible representation; and SPICE means, responsive to said converting means, for producing a time domain simulation of said microelectronic circuit from said nonlinear electronic elements and said SPICE compatible representation.
Claim 27
Independent Claim
89 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the steps of: producing a model of a portion of said linear electronic elements; converting said model of said portion of linear electronic elements into a SPICE compatible representation; and providing said SPICE compatible representation and said nonlinear electronic elements to SPICE to produce a time domain simulation of said microelectronic circuit from said nonlinear electronic elements and said SPICE compatible representation.
Claim 28
Independent Claim
89 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the steps of: producing a model of a portion of said linear electronic elements; converting said model of said portion of linear electronic elements into a SPICE compatible representation; and providing said SPICE compatible representation and said nonlinear electronic elements to SPICE to produce a time domain simulation of said microelectronic circuit from said nonlinear electronic elements and said SPICE compatible representation.
Claim 29
Dependent Claim
124 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; Asymptotic Waveform Evaluation (AWE) means, for producing a model of a portion of said linear elements; means, responsive to said Asymptotic Waveform Evaluation means, for converting said model into a SPICE stencil; and SPICE means, responsive to said converting means, for producing an operational model of said microelectronic circuit from said nonlinear electronic elements and said SPICE stencil.
Claim 30
Dependent Claim
124 words
Apparatus for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, said apparatus comprising: means for storing a representation of said microelectronic circuit in a computer system; means, responsive to said storing means, for dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; Asymptotic Waveform Evaluation (AWE) means, for producing a model of a portion of said linear elements; means, responsive to said Asymptotic Waveform Evaluation means, for converting said model into a SPICE stencil; and SPICE means, responsive to said converting means, for producing an operational model of said microelectronic circuit from said nonlinear electronic elements and said SPICE stencil.
Claim 31
Independent Claim
106 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the steps of: storing a representation of said microelectronic circuit in a computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; producing a model of a portion of said linear elements; converting said model into a SPICE stencil; and providing said SPICE stencil and said nonlinear electronic elements to SPICE to produce an operational model of said microelectronic circuit from said nonlinear electronic elements and said SPICE stencil.
Claim 32
Independent Claim
106 words
A method for simulating operation of a microelectronic circuit during a time interval, said microelectronic circuit having a plurality of interconnected linear and nonlinear electronic elements, comprising the steps of: storing a representation of said microelectronic circuit in a computer system; dividing the stored representation into a first circuit comprising linear elements and a second circuit comprising nonlinear elements; producing a model of a portion of said linear elements; converting said model into a SPICE stencil; and providing said SPICE stencil and said nonlinear electronic elements to SPICE to produce an operational model of said microelectronic circuit from said nonlinear electronic elements and said SPICE stencil.
References Cited (Backward Citations)
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