US5313095A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple-chip semiconductor device and a method of manufacturing the same
Assignee: Mitsubishi Electric Corp
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Filing: 1993-01-29
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Granted: 1994-05-17
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Expires: 2013-01-29
Abstract
Abstract A multiple-chip semiconductor device of the present invention comprises a first and a second leadframes. The same package envelops a power semiconductor chip mounted on a power chip mounting area in the first leadframe and a control chip mounted on a control chip mounting area in the second leadframe. In the device, the second leadframe is made of metal material which is processed easier than the first leadframe, and/or is finished thinner than the first leadframe. Thus, the multiple-chip semiconductor device can effectively dissipate the heat producing in the power semiconductor chip.
Inventors
- 👤 Tomohide Tagawa
- 👤 Takashi Takahashi
- 👤 Takayoshi Kawakami
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 23:29
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/421; H10W70/442; H10W70/461; H10W90/00; H10W90/811; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/547; H10W72/5473; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W74/00; H10W90/701; H10W90/751; H10W90/753; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
160 words
A multiple-chip semiconductor device, comprising: a semiconductor power chip; a control semiconductor chip for controlling said semiconductor power chip; a first leadframe having a first external lead which includes a power chip mounting area for mounting said semiconductor power chip, wherein said first leadframe is made of a first metal material; a second leadframe having a second external lead which includes a control chip mounting area for mounting said control chip, wherein said second leadframe is made of a second metal material which is processed easier than said first metal material, wherein the second leadframe is formed to be thinner than the first leadframe, and wherein the first metal material of the first leadframe has a larger heat conductivity than the second metal material of the second leadframe; and a package for enveloping said semiconductor power chip which is mounted on said power chip mounting area and said control semiconductor chip which is mounted on said control chip mounting area.
Claim 2
Dependent Claim
160 words
A multiple-chip semiconductor device, comprising: a semiconductor power chip; a control semiconductor chip for controlling said semiconductor power chip; a first leadframe having a first external lead which includes a power chip mounting area for mounting said semiconductor power chip, wherein said first leadframe is made of a first metal material; a second leadframe having a second external lead which includes a control chip mounting area for mounting said control chip, wherein said second leadframe is made of a second metal material which is processed easier than said first metal material, wherein the second leadframe is formed to be thinner than the first leadframe, and wherein the first metal material of the first leadframe has a larger heat conductivity than the second metal material of the second leadframe; and a package for enveloping said semiconductor power chip which is mounted on said power chip mounting area and said control semiconductor chip which is mounted on said control chip mounting area.
Claim 3
Dependent Claim
28 words
The multiple-chip semiconductor device of claim 1, further comprising: means for dissipating heat produced in said power semiconductor chip, said dissipating means connected with said first external lead.
Claim 4
Dependent Claim
15 words
The multiple-chip semiconductor device of claim 1, wherein said first leadframe is made of copper.
Claim 5
Dependent Claim
15 words
The multiple-chip semiconductor device of claim 2, wherein said second leadframe is made of 42-alloy.
Claim 6
Dependent Claim
51 words
The multiple-chip semiconductor device of claim 1, wherein said first and second leadframes are disposed so that said power chip mounting area and said control chip mounting area partially overlap each other, and wherein an insulation sheet is provided between said power chip mounting area and said control chip mounting area.
References Cited (Backward Citations)
US5049527A
Cited
US4633582A
Cited
US4794431A
Cited
US5057906A
Cited
US5049977A
Cited
US5147815A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-05-16 | 1997-11-15 | 1998-05-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-05-16 | 2001-11-15 | 2002-05-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-05-16 | 2005-11-15 | 2006-05-17 | $7700.00 | Window Closed / Lapsed |