US5311115A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Enhancement-depletion mode cascode current mirror
Assignee: National Semiconductor Corp
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Filing: 1993-08-11
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Granted: 1994-05-10
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Expires: 2013-08-11
Abstract
Abstract An improved current source having high output impedance, low saturation voltage, and less sensitivity to process parameters is achieved by having enhancement P-channel transistor devices used as current mirror, while depletion P-channel transistor devices are provided as the cascode devices. A "diode connected" depletion device may be inserted between the enhancement gate and the drain of the current reference transistor to reduce saturation voltage. The "diode connected" depletion device keeps the drains of the enhancement devices at a similar voltage even when the enhancement and depletion device threshold, i.e. VT, do not track over temperature or process. Thus, the current mirror circuit provides not only higher output impedance, lower saturation voltage, but is also less sensitive to process variation.
Inventors
- 👤 Donald M. Archer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 17:29
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/262; H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/84
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
213 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, the gate of the third transistor, and the gate of the fourth transistor; and wherein the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a voltage drop between the drain of the first transistor and the gate of the first transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 2
Dependent Claim
213 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, the gate of the third transistor, and the gate of the fourth transistor; and wherein the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a voltage drop between the drain of the first transistor and the gate of the first transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 3
Dependent Claim
31 words
A current mirror as in claim 1 wherein the first and the second transistors have substantially equal threshold voltages, and the third and the fourth transistors have substantially equal threshold voltages.
Claim 4
Dependent Claim
244 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage lower than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage lower than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, the base of the third transistor, and the base of the fourth transistor; and wherein the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate as a diode between the collector of the first transistor and the base of the first transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 5
Dependent Claim
244 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage lower than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and an emitter, and having a threshold voltage lower than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, the base of the third transistor, and the base of the fourth transistor; and wherein the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate as a diode between the collector of the first transistor and the base of the first transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 6
Dependent Claim
27 words
A current mirror as in claim 3 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
Claim 7
Dependent Claim
34 words
A current mirror of claim 3 wherein the threshold voltages of said first and second bipolar transistors are substantially equal, and the threshold voltages of said third and fourth bipolar transistors are substantially equal.
Claim 8
Dependent Claim
27 words
A current mirror as in claim 5 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
Claim 9
Dependent Claim
252 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, and the gate of the second transistor is also coupled to the drain of the second transistor to provide a first voltage drop between the common voltage source and the gate of the first transistor; and wherein the gate of the third transistor is coupled to the gate of the fourth transistor, and the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a second voltage drop between the drain of the first transistor and the gate of the fourth transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 10
Dependent Claim
252 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, and the gate of the second transistor is also coupled to the drain of the second transistor to provide a first voltage drop between the common voltage source and the gate of the first transistor; and wherein the gate of the third transistor is coupled to the gate of the fourth transistor, and the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a second voltage drop between the drain of the first transistor and the gate of the fourth transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 11
Dependent Claim
31 words
A current mirror as in claim 7 wherein the first and the second transistors have substantially equal threshold voltages, and the third and the fourth transistors have substantially equal threshold voltages.
Claim 12
Dependent Claim
275 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, and the base of the second transistor is also coupled to the collector of the second transistor to operate between the common voltage source and the base of the first transistor; and wherein the base of the third transistor is coupled to the base of the fourth transistor, and the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate between the collector of the first transistor and the base of the fourth transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 13
Dependent Claim
275 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, and the base of the second transistor is also coupled to the collector of the second transistor to operate between the common voltage source and the base of the first transistor; and wherein the base of the third transistor is coupled to the base of the fourth transistor, and the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate between the collector of the first transistor and the base of the fourth transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 14
Dependent Claim
27 words
A current mirror as in claim 9 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
Claim 15
Dependent Claim
36 words
A current mirror of claim 9 wherein said threshold voltages of the first and the second bipolar transistors are substantially equal, and said threshold voltages of the third and the fourth bipolar transistors are substantially equal.
Claim 16
Dependent Claim
27 words
A current mirror as in claim 11 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
Claim 17
Dependent Claim
252 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, and the gate of the first transistor is also coupled to the drain of the first transistor to provide a first voltage drop between the common voltage source and the gate of the second transistor; and wherein the gate of the third transistor is coupled to the gate of the fourth transistor, and the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a second voltage drop between the drain of the first transistor and the gate of the fourth transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 18
Dependent Claim
252 words
A current mirror circuit comprising: a first enhancement mode MOS transistor having a source, a gate, and a drain; a second enhancement mode MOS transistor having a source, a gate, and a drain; a third depletion mode MOS transistor having a source, a gate, and a drain; a fourth depletion mode MOS transistor having a source, a gate, and a drain; wherein the source of the first transistor and the source of the second transistor are coupled to a common voltage source; the drain of the first transistor is coupled to the source of the third transistor, and the drain of the second transistor is coupled to the source of the fourth transistor; the gate of the first transistor is coupled to the gate of the second transistor, and the gate of the first transistor is also coupled to the drain of the first transistor to provide a first voltage drop between the common voltage source and the gate of the second transistor; and wherein the gate of the third transistor is coupled to the gate of the fourth transistor, and the gate of the third transistor is also coupled to the drain of the third transistor to cause the third transistor to provide a second voltage drop between the drain of the first transistor and the gate of the fourth transistor, maintaining the drain of the first transistor and the drain of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 19
Dependent Claim
31 words
A current mirror as in claim 13 wherein the first and the second transistors have substantially equal threshold voltages, and the third and the fourth transistors have substantially equal threshold voltages.
Claim 20
Dependent Claim
275 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, and the base of the first transistor is also coupled to the collector of the first transistor to operate between the common voltage source and the base of the second transistor; and wherein the base of the third transistor is coupled to the base of the fourth transistor, and the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate between the collector of the first transistor and the base of the fourth transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 21
Dependent Claim
275 words
A current mirror circuit comprising: a first bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a second bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage; a third bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said first bipolar transistor; a fourth bipolar transistor having a collector, a base, and a emitter, and having a threshold voltage less than said threshold voltage of said second bipolar transistor; wherein the emitter of the first transistor and the emitter of the second transistor are coupled to a common ground; the collector of the first transistor is coupled to the emitter of the third transistor, and the collector of the second transistor is coupled to the emitter of the fourth transistor; the base of the first transistor is coupled to the base of the second transistor, and the base of the first transistor is also coupled to the collector of the first transistor to operate between the common voltage source and the base of the second transistor; and wherein the base of the third transistor is coupled to the base of the fourth transistor, and the base of the third transistor is also coupled to the collector of the third transistor to cause the third transistor to operate between the collector of the first transistor and the base of the fourth transistor, maintaining the collector of the first transistor and the collector of the second transistor at a similar voltage to generate an output current through the second and the fourth transistor.
Claim 22
Dependent Claim
27 words
A current mirror as in claim 15 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
Claim 23
Dependent Claim
36 words
A current mirror of claim 15 wherein said threshold voltages of the first and the second bipolar transistors are substantially equal, and said threshold voltages of the third and the fourth bipolar transistors are substantially equal.
Claim 24
Dependent Claim
27 words
A current mirror as in claim 17 wherein the first transistor and the second transistor comprise silicon, and the third transistor and the fourth transistor comprise germanium.
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