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US5307487A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of database synchronization with consistency determined by entry and exit counters used on both update and retrieval

Assignee: United States Department of the Navy
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Filing: 1991-10-03
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Granted: 1994-04-26
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Expires: 2011-10-03
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Abstract

Abstract A system for updating and reading a data base utilizes a pair of counters ere one counter is incremented prior to an update and the other is incremented following an update. The system permits the updating to take place at any time. By keeping track of the value of the counters the system either inhibits the reading from taking place during the updating if the updating commenced prior to the commencement of the reading or provides information that an updating occurred during the reading if the reading commenced prior to the commencement of the updating. The counters and data base are located within the RAM of a computer. The system has a first application program that gives information to a second application program via these RAM based components.

Inventors

  • 👤 Carlos M. Tavares
  • 👤 Durval M. Tavares
  • 👤 Donald R. Caron
  • 👤 John B. Bagley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 14:12
CPC Classifications
G; G06; G06F; G06F16/00; G06F16/20; G06F16/23; G06F16/2308; G06F16/2336; G06F16/2343; Y; Y10; Y10S; Y10S707/00; Y10S707/99931; Y10S707/99938; Y10S707/99951; Y10S707/99952; Y10S707/99953

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 237 words
A method of providing synchronization in data structures, by use of a computer, comprising the steps of: incrementing a first counter within RAM by means of a first application process; updating at least one data base record within RAM by means of said first application process; incrementing a second counter within RAM by means of said first application process after completion of updating of said at least one data base record within RAM; comparing the values of said first and second counters within RAM for equality by means of a second application process; defering further processing of said second application process if values of said first and second counters within RAM differ; sampling and retaining by means of said second application process the value within RAM of one of said first and second counters within RAM if said first and second counters have equal values; accessing by means of said second application process at least one data base record within RAM if said first and second counters within RAM have equal values; comparing by means of said second application process the said retained value within RAM and the value of the said first counter within RAM following the completion of accessing said at least one data base record within RAM; and indicating by means of said second application process indicate if the value of said retained value within RAM and said first counter within RAM are equal.
Claim 2
Independent Claim 237 words
A method of providing synchronization in data structures, by use of a computer, comprising the steps of: incrementing a first counter within RAM by means of a first application process; updating at least one data base record within RAM by means of said first application process; incrementing a second counter within RAM by means of said first application process after completion of updating of said at least one data base record within RAM; comparing the values of said first and second counters within RAM for equality by means of a second application process; defering further processing of said second application process if values of said first and second counters within RAM differ; sampling and retaining by means of said second application process the value within RAM of one of said first and second counters within RAM if said first and second counters have equal values; accessing by means of said second application process at least one data base record within RAM if said first and second counters within RAM have equal values; comparing by means of said second application process the said retained value within RAM and the value of the said first counter within RAM following the completion of accessing said at least one data base record within RAM; and indicating by means of said second application process indicate if the value of said retained value within RAM and said first counter within RAM are equal.
Claim 3
Dependent Claim 32 words
A method of providing synchronization in data structures according to claim 1 further comprising a writer being used to achieve the step of updating at least one data base record within RAM.
Claim 4
Dependent Claim 45 words
A method of providing synchronization in data structures according to claim 2 further comprising at least one reader being used to achieve the step of accessing at least one data base record within RAM if said first and second counters within RAM have equal values.

References Cited (Backward Citations)

US4320451A Cited
US4591976A Cited
US4847754A Cited
US5119490A Cited
US4928222A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-04-25 1997-10-25 1998-04-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-04-25 2001-10-25 2002-04-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-04-25 2005-10-25 2006-04-26 $7700.00 Window Closed / Lapsed

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