Abstract A semiconductor memory comprises a plurality of non-volatile DRAMs and volatile DRAMs overlaying an identical semiconductor substrate, each of the non-volatile DRAMs comprising a word select transistor having a word selective gate electrode, a recall transistor having a recall gate electrode, a Flotox type memory transistor having a floating gate electrode and a capacitor having a storage node and a capacitor electrode, and each of the volatile DRAMs comprising a select transistor having a selective gate electrode and a capacitor having a capacitor lower electrode, a storage node and a capacitor upper electrode; the word selective gate electrode, the recall gate electrode and the floating gate electrode in the non-volatile DRAM and the selective gate electrode and the capacitor lower electrode in the volatile DRAM being formed of a first conductive layer on the semiconductor substrate, the storage nodes in the non-volatile DRAM and volatile DRAM being formed of a second conductive layer on the first conductive layer, the capacitor electrode in the non-volatile DRAM and the capacitor upper electrode in the volatile DRAM being formed of a third conductive layer on the second conductive layer, and any of the lower electrode and the upper electrode being common to a lower electrode and a upper electrode in their adjacent cells.
A semiconductor memory comprising a plurality of nonvolatile DRAMs and volatile DRAMs overlaying an identical semiconductor substrate, each of the non-volatile DRAMs comprising a word select transistor having a word selective gate electrode, a recall transistor having a recall gate electrode, a Flotox type memory transistor having a floating gate electrode and a capacitor having a storage node and a capacitor electrode, and each of the volatile DRAMs comprising a select transistor having a selective gate electrode and a capacitor having a capacitor lower electrode, a storage node and a capacitor upper electrode; the word selective gate electrode, the recall gate electrode and the floating gate electrode in the non-volatile DRAM and the selective gate electrode and the capacitor lower electrode in the volatile DRAM being formed of a first conductive layer on the semiconductor substrate, the storage nodes in the non-volatile DRAM and volatile DRAM being formed of a second conductive layer on the first conductive layer, the capacitor electrode in the non-volatile DRAM and the capacitor upper electrode in the volatile DRAM being formed of a third conductive layer on the second conductive layer, and any of the lower electrode and the upper electrode being common to a lower electrode and a upper electrode in their adjacent cells.
Claim 2
Dependent Claim
210 words
A semiconductor memory comprising a plurality of nonvolatile DRAMs and volatile DRAMs overlaying an identical semiconductor substrate, each of the non-volatile DRAMs comprising a word select transistor having a word selective gate electrode, a recall transistor having a recall gate electrode, a Flotox type memory transistor having a floating gate electrode and a capacitor having a storage node and a capacitor electrode, and each of the volatile DRAMs comprising a select transistor having a selective gate electrode and a capacitor having a capacitor lower electrode, a storage node and a capacitor upper electrode; the word selective gate electrode, the recall gate electrode and the floating gate electrode in the non-volatile DRAM and the selective gate electrode and the capacitor lower electrode in the volatile DRAM being formed of a first conductive layer on the semiconductor substrate, the storage nodes in the non-volatile DRAM and volatile DRAM being formed of a second conductive layer on the first conductive layer, the capacitor electrode in the non-volatile DRAM and the capacitor upper electrode in the volatile DRAM being formed of a third conductive layer on the second conductive layer, and any of the lower electrode and the upper electrode being common to a lower electrode and a upper electrode in their adjacent cells.
Claim 3
Dependent Claim
19 words
A semiconductor of claim 1 wherein the first, the second and the third conductive layers are formed of polysilicon.
Claim 4
Dependent Claim
17 words
A semiconductor of claim 1 wherein the capacitor lower electrode is formed as a device isolation electrode.