Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
211 words
A method of writing into a semiconductor memory including a MOS transistor formed on a surface of a first conductivity type semiconductor substrate and an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, said MOS transistor having a source and the drain of a second conductivity type forming respective PN junctions with said semiconductor substrate, wherein the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film, the method comprising the steps of: applying a first voltage across the upper electrode of the anti-fuse and the source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is transistor is turned on; and applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, said second voltage being of a polarity so as to forward bias the PN junction between the drain and the semiconductor substrate.
Claim 2
Independent Claim
211 words
A method of writing into a semiconductor memory including a MOS transistor formed on a surface of a first conductivity type semiconductor substrate and an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, said MOS transistor having a source and the drain of a second conductivity type forming respective PN junctions with said semiconductor substrate, wherein the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film, the method comprising the steps of: applying a first voltage across the upper electrode of the anti-fuse and the source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is transistor is turned on; and applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, said second voltage being of a polarity so as to forward bias the PN junction between the drain and the semiconductor substrate.
Claim 3
Independent Claim
185 words
A method for writing into a semiconductor memory including a MOS transistor formed on a surface of a semiconductor substrate and an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, wherein the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a breakdown of the insulating film, the method comprising the step of: applying a first voltage across the upper electrode of the anti-fuse and a source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is turned on; and subsequently applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate such that a large amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse flows between the upper electrode of the anti-fuse and the semiconductor substrate, through the insulating film and the drain of the MOS transistor, said second voltage being of a polarity different from the first voltage.
Claim 4
Independent Claim
185 words
A method for writing into a semiconductor memory including a MOS transistor formed on a surface of a semiconductor substrate and an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, wherein the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a breakdown of the insulating film, the method comprising the step of: applying a first voltage across the upper electrode of the anti-fuse and a source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is turned on; and subsequently applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate such that a large amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse flows between the upper electrode of the anti-fuse and the semiconductor substrate, through the insulating film and the drain of the MOS transistor, said second voltage being of a polarity different from the first voltage.
Claim 5
Dependent Claim
53 words
A method according to claim 1, wherein the MOS transistor comprises an N-channel type formed on a P-type semiconductor substrate, the first voltage applies a positive potential to the upper electrode with respect to the source, the second voltage applies a negative potential to the upper electrode with respect to the semiconductor substrate.
Claim 6
Dependent Claim
53 words
A method according to claim 1, wherein the MOS transistor comprises a P-channel type formed on an N-type semiconductor substrate, the first voltage applies a negative potential to the upper electrode with respect to the source, the second voltage applies a positive potential to the upper electrode with respect to the semiconductor substrate.
Claim 7
Dependent Claim
202 words
A semiconductor memory, comprising: a MOS transistor formed on a surface of a first conductivity type semiconductor substrate; an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, said MOS transistor having a source and the drain of a second conductivity type forming respective PN junctions with said semiconductor substrate so that the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film; means for applying a first voltage across the upper electrode of the anti-fuse and the source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is turned on; and means for applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, said second voltage being of a polarity so as to forward bias the PN junction between the drain and the semiconductor substrate.
Claim 8
Dependent Claim
202 words
A semiconductor memory, comprising: a MOS transistor formed on a surface of a first conductivity type semiconductor substrate; an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor, said MOS transistor having a source and the drain of a second conductivity type forming respective PN junctions with said semiconductor substrate so that the anti-fuse becomes conductive for storing data when a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film; means for applying a first voltage across the upper electrode of the anti-fuse and the source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse, when the MOS transistor is turned on; and means for applying a second voltage across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, said second voltage being of a polarity so as to forward bias the PN junction between the drain and the semiconductor substrate.
Claim 9
Dependent Claim
55 words
A semiconductor memory according to claim 5, wherein the MOS transistor comprises an N-channel type formed on a P-type semiconductor substrate, said first voltage applies a positive potential to the upper electrode with respect to the source and said second voltage applies a negative potential to the upper electrode with respect to the semiconductor substrate.
Claim 10
Dependent Claim
55 words
A semiconductor memory according to claim 5, wherein the MOS transistor comprises a P-channel type formed on an N-type semiconductor substrate, said first voltage applies a negative potential to the upper electrode with respect to the source and said second voltage applies a positive potential to the upper electrode with respect to the semiconductor substrate.
Claim 11
Dependent Claim
180 words
A semiconductor memory, comprising: a MOS transistor formed on a surface of a first conductivity type semiconductor substrate; an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor so that the anti-fuse becomes conductive for storing data when an application of a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film; means for applying a first voltage when the MOS transistor is turned on, across the upper electrode of the anti-fuse and a source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse; means for subsequently applying a second voltage of a different polarity than the first voltage, across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, through the insulating film and the drain of the MOS transistor.
Claim 12
Dependent Claim
180 words
A semiconductor memory, comprising: a MOS transistor formed on a surface of a first conductivity type semiconductor substrate; an anti-fuse formed of an insulating film and an upper electrode on a drain of the MOS transistor so that the anti-fuse becomes conductive for storing data when an application of a voltage across the drain and the upper electrode causes a dielectric breakdown of the insulating film; means for applying a first voltage when the MOS transistor is turned on, across the upper electrode of the anti-fuse and a source of the MOS transistor to cause the dielectric breakdown of the insulating film of the anti-fuse; means for subsequently applying a second voltage of a different polarity than the first voltage, across the upper electrode of the anti-fuse and the semiconductor substrate so that a larger amount of a second current than an amount of a first current required for breaking down the insulating film of the anti-fuse, flows between the upper electrode of the anti-fuse and the semiconductor substrate, through the insulating film and the drain of the MOS transistor.