Semiconductor device having a wiring strip of noble metal and process of fabricating the semiconductor device

Claim 2

A semiconductor device fabricated on a semiconductor substrate, comprising: a multi-level wiring structure formed over said semiconductor substrate, having at least one lower wiring comprised of gold covered with an inter-level insulating film, an upper wiring comprised of nobel metal extending over said inter-level insulating film, and an inter-level wiring having a conductive metal tube formed on an inner surface of a contact hole of said inter-level insulating film and formed of a substance selected from the group consisting of titanium and titanium tungsten alloy and a conductive block of gold and provided in said conductive metal tube for interconnecting said lower and upper wiring, said at least one lower wiring having a titanium-diffused region held in contact with said conductive block and formed through a mutual diffusion between gold atoms and titanium atoms.

Claim 3

A semiconductor device as set forth in claim 1, in which said nobel metal is gold.

Claim 4

A semiconductor integrated circuit device fabricated on a semiconductor substrate, comprising: a) circuit components forming parts of an integrated circuit; and b) a multi-level wiring structure formed over said semiconductor substrate, having at least one lower wiring comprised of gold covered with an inter-level insulating film, an upper wiring of gold extending over said inter-level insulating film, and an inter-level wiring having a conductive metal tube formed on an inner surface of a contact hole of said inter-level insulating film and formed of a substance selected from the group consisting of titanium and titanium tungsten alloy and a conductive block of gold and provided in said conductive metal tube for interconnecting said lower and upper wirings, said at least one lower wiring having a titanium-diffused region held in contact with said conductive block and formed through a mutual diffusion between gold atoms and titanium atoms.

Claim 5

A semiconductor integrated circuit device fabricated on a semiconductor substrate, comprising: a) circuit components forming parts of an integrated circuit; and b) a multi-level wiring structure formed over said semiconductor substrate, having at least one lower wiring comprised of gold covered with an inter-level insulating film, an upper wiring of gold extending over said inter-level insulating film, and an inter-level wiring having a conductive metal tube formed on an inner surface of a contact hole of said inter-level insulating film and formed of a substance selected from the group consisting of titanium and titanium tungsten alloy and a conductive block of gold and provided in said conductive metal tube for interconnecting said lower and upper wirings, said at least one lower wiring having a titanium-diffused region held in contact with said conductive block and formed through a mutual diffusion between gold atoms and titanium atoms.

Claim 6

A semiconductor device as set forth in claim 1, wherein said conductive metal tube has thickness ranging between 100 angstroms and 200 angstroms, said mutual diffusion being carried out in a high temperature nitrogen atmosphere.

Claim 7

A semiconductor device as set forth in claim 1, wherein said conductive block of gold is gown through an electroless plating.

Claim 8

A semiconductor device as set forth in claim 3, wherein said conductive metal tube has a thickness ranging between 100 angstroms and 200 angstroms, said mutual diffusion being carried out in high temperature nitrogen atmosphere.

Claim 9

A semiconductor device as set forth in claim 4, wherein said conductive block of gold is grown through an electroless plating.

Claim 10

A semiconductor device as set forth in claim 6, wherein said conductive block of gold is grown through an electroless plating.