Write circuit having current mirrors between predriver and write driver circuits for maximum head voltage swing

Claim 2

A write preamplifier for driving a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to the magnetic head; a data input for receiving data input signals; means for generating a predriver current, which is connected to the second supply terminal; a predriver circuit connected to the data input and having first and second predriver current paths connected between the first supply terminal and the means for generating a predriver current, wherein the predriver circuit directs the predriver current through the first and second predriver current paths as a function of the data input signals; a write driver circuit having first and second write current paths connected between the first and second supply terminals and connected across the head contact terminals, wherein the first write current path directs current through the head contact terminals in a first direction and the second write current path directs current through the head contact terminals in a second direction, opposite to the first direction; and means connected between the predriver circuit and the write drive circuit for mirroring the predriver current in the first and second predriver current paths into the first and second write driver current paths, respectively, such that the means for generating a predriver current is connected with the first and second predriver current paths and separate from the first and second write current paths.

Claim 3

The write circuit of claim 1 wherein the data input includes first and second data input terminals for receiving complementary data input signals.

Claim 4

The write circuit of claim 2 wherein the first data input terminal is connected to the first predriver current path to control the flow of predriver current in the first predriver current path and wherein the second data input terminal is connected to the second predriver current path to control the flow of predriver current in the second predriver current path.

Claim 5

The write preamplifier of claim 3 wherein the first and second predriver current paths each includes: a current control transistor having a first electrode, a second electrode, and a control electrode, wherein the second electrode is connected in series with the means for generating the predriver current and the control electrode is connected to the respective data input terminal; a current sensing transistor having a first electrode, a second electrode, and a control electrode, wherein the second electrode is connected to the first electrode of the current control transistor; and a resistor connected in series between the first electrode of the current sensing transistor and the first voltage supply terminal.

Claim 6

The write circuit of claim 4 wherein: the current sensing transistor comprises a diode-connected PNP-type transistor having a base, a collector, and an emitter with the base connected to the collector; and the current control transistor comprises an NPN-type transistor having a base connected to the respective data input, a collector connected to the collector of the current sensing transistor and an emitter connected to the means for generating a predriver current.

Claim 7

The write preamplifier of claim 4 wherein the predriver circuit further comprises: a Schottky-diode having an anode and a cathode, with the anode connected to the first supply terminal; a first degeneration resistor connected in series between the cathode and the control and second electrodes of the current sensing transistor in the first predriver current path; and a second degeneration resistor connected in series between the cathode and the control and second electrodes of the current sensing transistor in the second predriver current path.

Claim 8

The write circuit of claim 1 wherein the first and second write current paths each include: a pull-down transistor having a first electrode, a second electrode, and a control electrode, wherein the first electrode is connected to the respective head contact terminal and the second electrode is connected to the second voltage supply terminal; a pull-up transistor having a first electrode, a second terminal, and a control electrode, wherein the second electrode is connected to the respective head contact terminal; and a resistor connected in series between the first voltage supply terminal and the first electrode of the pull-up transistor.

Claim 9

The write circuit of claim 7 wherein the pull-up transistors in the first and second write current paths comprise PNP-type transistors and wherein the pull-down transistors in the first and second write current paths comprise Schottky-clamped NPN-type transistors.

Claim 10

The write circuit of claim 7 wherein the first electrodes of the pull-up transistors in the first and second write current paths ar connected together.

Claim 11

The write preamplifier of claim 7 wherein: the control electrode of the pull-down transistor in the first write driver current path is connected to the means for mirroring the predriver current, such that the pull-down transistor switches between ON and OFF states as function of the predriver current in the first predriver current path; and the control electrode of the pull-down transistor in the second write driver current path is connected to the means for mirroring the predriver current, such that the pull-down transistor switches between an ON and OFF states as a function of the predriver current in the second predriver current path.

Claim 12

The write circuit of claim 7 and further comprising a bias circuit connected between the data input terminals nd the control electrodes of the pull-down transistors, which switches the pull-down transistors between ON and OFF states as a function of the data input signals.

Claim 13

The write circuit of claim 1 wherein the bias circuit comprises first and second base discharge circuits connected between the data input terminal and the control electrodes of the pull-down transistors in the first and second write driver current paths, respectively, for rapidly discharging the control electrodes when the pull-down transistors are switched from the ON state to the OFF state.

Claim 14

The write circuit of claim 1 wherein the means for mirroring amplifies the predriver current into the first and second write driver current paths.

Claim 15

The write circuit of claim 13 wherein the means for mirroring amplifies the predriver current into the first and second write driver current paths by a factor of about 10.

Claim 16

The write circuit of claim 1 wherein the means for mirroring comprises: a first current mirror comprising: a first predriver current sensing transistor having first and second electrodes connected in series with the first predriver current path and having a control electrode connected to the second electrode in a diode configuration; and a first pull-up transistor having first and second electrodes connected in series with the first write current path and having a control electrode connected to the control electrode of the first predriver current sensing transistor; and a second current mirror comprising: a second predriver current sensing transistor having first and second electrodes connected in series with the second predriver current path and having a control electrode connected to the second electrode in a diode configuration; and a second pull-up transistor having first and second electrodes connected in series with the second write driver current path and having a control electrode connected to the control electrode of the second predriver current sensing transistor.

Claim 17

The write circuit of claim 15 wherein the first and second current mirrors each comprise a base compensation circuit connected between the control terminal and the second electrode of each predriver current sensing transistors to compensate for current loss in the first and second current mirrors.

Claim 18

A write preamplifier for use with a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to a magnetic head; first and second data input terminals for receiving data input signals; a predriver current source connected to the second supply terminal, which generates a predriver current; a predriver circuit having first and second predriver current paths connected between the first supply terminal and the predriver current source, wherein the first and second predriver current paths are connected to the first and second data input terminals, respectively, such that the data input signals control the flow of predriver current through the first and second predriver current paths; and a write driver circuit, connected between the first and second supply terminals, having first and second write current paths connected across the head contact terminals which direct a write current through the head contact terminals in opposite directions, wherein the first and second write current paths are connected to the first and second predriver current paths, respectively, in a current-mirror configuration to mirror the predriver current in the predriver circuit into the write current in the write driver circuit such that the predriver current source is connected within the first and second predriver current paths and separate from the first and second write current paths.

Claim 19

A write preamplifier for use with a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to a magnetic head; first and second data input terminals for receiving data input signals; a predriver current source connected to the second supply terminal, which generates a predriver current; a predriver circuit having first and second predriver current paths connected between the first supply terminal and the predriver current source, wherein the first and second predriver current paths are connected to the first and second data input terminals, respectively, such that the data input signals control the flow of predriver current through the first and second predriver current paths; and a write driver circuit, connected between the first and second supply terminals, having first and second write current paths connected across the head contact terminals which direct a write current through the head contact terminals in opposite directions, wherein the first and second write current paths are connected to the first and second predriver current paths, respectively, in a current-mirror configuration to mirror the predriver current in the predriver circuit into the write current in the write driver circuit such that the predriver current source is connected within the first and second predriver current paths and separate from the first and second write current paths.

Claim 20

A write preamplifier for driving a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to the magnetic head; a data input for receiving data input signals; means for generating a predriver current, which is connected to the second supply terminal; a predriver circuit connected to the data input and having first and second predriver current paths connected between the first supply terminal and the means for generating a predriver current, wherein the predriver circuit directs the predriver current through the first and second predriver current paths as a function of the data input signals; a write driver circuit having first and second write current paths connected between the first and second supply terminals and connected across the head contact terminals, wherein the first write current path directs current through the head contact terminals in a first direction and the second write current path directs current through the head contact terminals in a second direction, opposite to the first direction; and means connected between the predriver circuit and the write driver circuit for amplifying the predriver current in the first and second predriver current paths into the first and second write driver current paths, respectively.

Claim 21

A write preamplifier for driving a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to the magnetic head; a data input for receiving data input signals; means for generating a predriver current, which is connected to the second supply terminal; a predriver circuit connected to the data input and having first and second predriver current paths connected between the first supply terminal and the means for generating a predriver current, wherein the predriver circuit directs the predriver current through the first and second predriver current paths as a function of the data input signals; a write driver circuit having first and second write current paths connected between the first and second supply terminals and connected across the head contact terminals, wherein the first write current path directs current through the head contact terminals in a first direction and the second write current path directs current through the head contact terminals in a second direction, opposite to the first direction; and means connected between the predriver circuit and the write driver circuit for amplifying the predriver current in the first and second predriver current paths into the first and second write driver current paths, respectively.

Claim 22

A write preamplifier for driving a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to the magnetic head; a data input for receiving data input signals; means for generating a predriver current, which is connected to the second supply terminal; a predriver circuit connected to the data input and having first and second supply terminal; a predriver circuit connected to the data input and having first and second predriver current paths connected between the first supply terminal and the means for generating a predriver current, wherein the predriver circuit directs the predriver current through the first and second predriver current paths as a function of the data input signals; a write driver circuit having first and second write current paths connected between the first and second supply terminals and connected across the head contact terminals, wherein the first write current path directs current through the head contact terminals in a first direction and the second write current path directs current through the head contact terminals in a second direction, opposite to the first direction; a first current mirror connected between the first predriver current path and the first write current path for mirroring the predriver current in the first predriver current path into the first write current path; and a second current mirror connected between the second predriver current path and the second write current path for mirroring the predriver current in the second predriver current path into the second write current path.

Claim 23

A write preamplifier for driving a magnetic head in a magnetic storage system, the write preamplifier comprising: first and second voltage supply terminals; first and second head contact terminals for connection to the magnetic head; a data input for receiving data input signals; means for generating a predriver current, which is connected to the second supply terminal; a predriver circuit connected to the data input and having first and second supply terminal; a predriver circuit connected to the data input and having first and second predriver current paths connected between the first supply terminal and the means for generating a predriver current, wherein the predriver circuit directs the predriver current through the first and second predriver current paths as a function of the data input signals; a write driver circuit having first and second write current paths connected between the first and second supply terminals and connected across the head contact terminals, wherein the first write current path directs current through the head contact terminals in a first direction and the second write current path directs current through the head contact terminals in a second direction, opposite to the first direction; a first current mirror connected between the first predriver current path and the first write current path for mirroring the predriver current in the first predriver current path into the first write current path; and a second current mirror connected between the second predriver current path and the second write current path for mirroring the predriver current in the second predriver current path into the second write current path.