US5287093A
Expired / Lapsed
US
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Image processor for producing cross-faded image from first and second image data
Assignee: Panasonic Holdings Corp
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Filing: 1991-06-07
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Granted: 1994-02-15
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Expires: 2011-06-07
Abstract
Abstract An image processor produces a cross-faded image from first and second image data and first and second control data. The cross-faded image corresponds to a product of the first image data and the first control data and a product of the second image data and the second control data. The image processor includes a first address generator which generates a first l-bit address signal made up of the upper (n-k1) bits of the first n-bit image data and the upper (m-k2) bits of the first m-bit control data. Similarly, a second address generator is provided which generates a second l-bit address signal made up of the upper (n-k1) bits of the second n-bit image data and the upper (m-k2) bits of the second m-bit control data. The number of bits l of each address signal is less than a sum of the bits n and m of each of the image data and control data. The first and second address signals are used to access a ROM which is used to generate corresponding first and second product data. The product data is summed to generate cross-faded image data.
Inventors
- 👤 Yoshinori Amano
- 👤 Misao Kato
- 👤 Yoshio Hirauchi
- 👤 Mari Kimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:23
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/222; H04N5/262; H04N5/265; G; G06; G06T; G06T11/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
266 words
An image process for generating third image data C from first n-bit image data A, second n-bit image data B, first m-bit control data α 1 and second m-bit control data α 2 , wherein m and n are positive integers, comprising: a first address generator for generating a first l-bit address signal made up of the upper (n-k 11 ) bits of the first n-bit image data A and the upper (m-k 12 ) bits of the first m-bit control data α 1 , wherein l is a positive integer, wherein k 11 and k 12 are each integers having a value of at least zero, wherein l<(m+n), wherein l={(n-k 11 )+(m-k 12 )}, and wherein k=k 11 +k 12 (0≦k 11 ≦k, 0≦k 12 ≦k); a second address generator for generating a second l-bit address signal made up of the upper (n-k 21 ) bits of the second n-bit image data Band the upper (m-k 22 ) bits of the second m-bit control data α 2 , wherein k 21 and k 22 are each integers having a value of at least zero, wherein l={(n-k 21 )+(m-k 22 )}, and wherein k=k 21 +k 22 (0≦k 21 ≦k, 0≦k 22 ≦k); a read-only-memory having a look-up table for generating first product data (A·α 1 ) and second product data (B·α 2 ) in accordance with said first l-bit address data and said second l-bit address data applied thereto, respectively; means for summing said first product data (A·α 1 ) and said second product data (B·α 2 ) to obtain the third image data C.
Claim 2
Dependent Claim
266 words
An image process for generating third image data C from first n-bit image data A, second n-bit image data B, first m-bit control data α 1 and second m-bit control data α 2 , wherein m and n are positive integers, comprising: a first address generator for generating a first l-bit address signal made up of the upper (n-k 11 ) bits of the first n-bit image data A and the upper (m-k 12 ) bits of the first m-bit control data α 1 , wherein l is a positive integer, wherein k 11 and k 12 are each integers having a value of at least zero, wherein l<(m+n), wherein l={(n-k 11 )+(m-k 12 )}, and wherein k=k 11 +k 12 (0≦k 11 ≦k, 0≦k 12 ≦k); a second address generator for generating a second l-bit address signal made up of the upper (n-k 21 ) bits of the second n-bit image data Band the upper (m-k 22 ) bits of the second m-bit control data α 2 , wherein k 21 and k 22 are each integers having a value of at least zero, wherein l={(n-k 21 )+(m-k 22 )}, and wherein k=k 21 +k 22 (0≦k 21 ≦k, 0≦k 22 ≦k); a read-only-memory having a look-up table for generating first product data (A·α 1 ) and second product data (B·α 2 ) in accordance with said first l-bit address data and said second l-bit address data applied thereto, respectively; means for summing said first product data (A·α 1 ) and said second product data (B·α 2 ) to obtain the third image data C.
Claim 3
Dependent Claim
14 words
An image processor as recited in claim 1, wherein α 2 =1-α 1 .
Claim 4
Dependent Claim
42 words
An image processor as recited in claim 1, wherein said first address generator includes first selector means for setting a value of k 11 and a value of k 12 according to a value of the first control signal α 1 .
Claim 5
Dependent Claim
62 words
An image processor as recited in claim 3, wherein said first selector means includes means for selecting the upper k 12 bits of the lower k bits of the first n-bit image data A and the upper k 11 bits of the lower k bits of the first m-bit control data α 1 to be included in the first l-bit address signal.
Claim 6
Dependent Claim
42 words
An image processor as recited in claim 4, wherein said second address generator includes second selector means for setting a value of k 21 and a value of k 22 according to a value of the second control signal α 2 .
Claim 7
Dependent Claim
62 words
An image processor as recited in claim 5, wherein said second selector means includes means for selecting the upper k 22 bits of the lower k bits of the second n-bit image data B and the upper k 21 bits of the lower k bits of the second m-bit control data α 2 to be included in the second l-bit address signal.
Claim 8
Dependent Claim
14 words
An image processor as recited in claim 6, wherein α 2 =1-α 1 .
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-02-14 | 1997-08-16 | 1998-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-02-14 | 2001-08-16 | 2002-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-02-14 | 2005-08-16 | 2006-02-15 | $7700.00 | Window Closed / Lapsed |