US5286962A
Expired / Lapsed
US
⏱️ 0.0 years remaining
IC card for prevention of fraudulent use
Assignee: Renesas Electronics Corp
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Filing: 1991-11-21
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Granted: 1994-02-15
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Expires: 2011-11-21
Abstract
Abstract Disclosed herein is an IC card provided with means for generating a first signal indicating execution to a test program and a logic circuit for receiving the first signal and a second signal for commanding data writing in the prescribed region of the memory. The logic circuit allows output of the second signal during execution of the test program, and inhibits such output of the second signal ween an application program is executed. The IC card is so structured that a prescribed region of a memory is brought into read-only state during execution of an application program so that the IC card is identified with read data, thereby preventing fraudulent use of the IC card.
Inventors
- 👤 Shuzo Fujioka
- 👤 Kenichi Takahira
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 15:16
CPC Classifications
G; G07; G07F; G07F7/00; G07F7/08; G07F7/10; G07F7/1008; G06; G06K; G06K19/00; G06K19/06; G06K19/067; G06K19/07; G06K19/0723; G06Q; G06Q20/00; G06Q20/30; G06Q20/34; G06Q20/341; G06Q20/357; G07F7/0806; G07F7/0833; G07F7/084; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/31719
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
89 words
An IC card, comprising: a CPU for outputting a test signal entering an active state in execution of a test program; a first storage part storing said test program; a second storage part storing an application program; a readable and writable third storage part provided with at least a region for storing a code being specific to said IC card; and switching means for receiving said test signal for bringing said third storage part into a readable and unwritable state when said test signal is in an inactive state.
Claim 2
Dependent Claim
89 words
An IC card, comprising: a CPU for outputting a test signal entering an active state in execution of a test program; a first storage part storing said test program; a second storage part storing an application program; a readable and writable third storage part provided with at least a region for storing a code being specific to said IC card; and switching means for receiving said test signal for bringing said third storage part into a readable and unwritable state when said test signal is in an inactive state.
Claim 3
Dependent Claim
55 words
An IC card in accordance with claim 1, further comprising a reset signal terminal for receiving a reset signal for initializing said CPU, wherein said test signal being outputted from said CPU enters an active state when said reset signal is received, while the same enters an inactive state when said application program is executed.
Claim 4
Dependent Claim
58 words
An IC card in accordance with claim 1, further comprising a data input/output terminal for data input/output in relation to an external apparatus, for receiving a test command signal commanding execution/non-execution of said test program, wherein said CPU brings said test signal into an active state only when said test command signal commands execution of said test program.
Claim 5
Dependent Claim
21 words
An IC card in accordance with claim 2, wherein said first and second storage parts are first and second ROMs respectively.
Claim 6
Dependent Claim
16 words
An IC card in accordance with claim 2, wherein said third storage part is an EEPROM.
Claim 7
Dependent Claim
20 words
An IC card in accordance with claim 2, wherein said third storage part has a backup function of a battery.
Claim 8
Dependent Claim
71 words
An IC card in accordance with claim 2, further comprising: a data input/output terminal for data input/output with respect to an external apparatus, an input/output circuit for transferring data between the same and said data input/output terminal, and a bus connected with said CPU, said first to third storage parts and said input/output circuit for enabling data transfer between said CPU, said first to third storage parts and said input/output circuit.
Claim 9
Dependent Claim
22 words
An IC card in accordance with claim 7, further comprising a fourth storage part connected with said bus for temporarily preserving data.
Claim 10
Dependent Claim
16 words
An IC card in accordance with claim 8, wherein said fourth storage part is a RAM.
Claim 11
Dependent Claim
33 words
An IC card in accordance with claim 8, further comprising: a positive power input terminal, a power earthing terminal for inputting a ground potential, and a clock terminal for inputting a clock signal.
Claim 12
Dependent Claim
31 words
An IC card in accordance with claim 10, wherein said application program can be executed only when said code being stored in said third storage part is at a prescribed value.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-02-14 | 1997-08-16 | 1998-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-02-14 | 2001-08-16 | 2002-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-02-14 | 2005-08-16 | 2006-02-15 | $7700.00 | Window Closed / Lapsed |