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US5286672A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming field oxide regions

Assignee: STMicroelectronics lnc USA
•
Filing: 1992-03-10
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Granted: 1994-02-15
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Expires: 2012-03-10
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Abstract

Abstract A method for forming field oxide regions which results in reduced diffusion of the channel stop implant into the active regions of the substrate. According to the present invention, an opening is formed through an oxidation barrier to define the field oxide regions. A dielectric layer is then deposited over the device, followed by implantation of a channel stop region. With the dielectric layer in place, the field oxide region is formed. During formation of the field oxide, the channel stop region will not diffuse into the active regions in the substrate. The thickness and conformality of the dielectric layer will affect the distance that the channel stop implant resides from the edges of the field oxide region.

Inventors

  • 👤 Robert L. Hodges
  • 👤 Fu-Tai Liou

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 14:00
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 90 words
A method for formation of an isolation region in an integration circuit, comprising the steps of: creating an oxidation barrier over a semiconductor substrate; patterning and etching the oxidation barrier to define an opening where oxide will be grown; forming a conformal layer of polycrystalline silicon over the oxidation barrier and extending into the opening; implanting a channel stop region through the conformal layer of polycrystalline silicon into the semiconductor substrate; and oxidizing a field oxide region in the substrate while the conformal layer of polycrystalline silicon remains in place.
Claim 2
Independent Claim 90 words
A method for formation of an isolation region in an integration circuit, comprising the steps of: creating an oxidation barrier over a semiconductor substrate; patterning and etching the oxidation barrier to define an opening where oxide will be grown; forming a conformal layer of polycrystalline silicon over the oxidation barrier and extending into the opening; implanting a channel stop region through the conformal layer of polycrystalline silicon into the semiconductor substrate; and oxidizing a field oxide region in the substrate while the conformal layer of polycrystalline silicon remains in place.
Claim 3
Dependent Claim 24 words
The method of claim 1, wherein said step of creating the oxidation barrier comprises depositing a layer of silicon nitride over the semiconductor substrate.
Claim 4
Dependent Claim 49 words
The method of claim 1, wherein said step of creating the oxidation barrier comprises the steps of: forming a layer of oxide over the semiconductor substrate; depositing a layer of polycrystalline silicon over the layer of oxide; and depositing a layer of silicon nitride over the polycrystalline silicon layer.
Claim 5
Dependent Claim 39 words
The method of claim 1, wherein the thickness of said conformal layer of polycrystalline silicon determines a distance that the channel stop region is located from the edges of the opening during the implantation of the channel stop region.

References Cited (Backward Citations)

JPS5840839A Cited
US4637128A Cited
EP0369842A1 Cited
EP0405850A2 Cited
EP0436475A2 Cited
EP0471381A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1997-02-14 1997-08-16 1998-02-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2001-02-14 2001-08-16 2002-02-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2005-02-14 2005-08-16 2006-02-15 $7700.00 Window Closed / Lapsed

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