Spread spectrum receiving device

Claim 2

A spread spectrum receiving device comprising: dividing and converting means, which divides a received signal into two parts, which are converted into a COS component signal and a SIN component signal by using a first carrier signal having a same frequency as a modulation frequency for said received signal and a second carrier signal having the same frequency and a phase different by π/2 from that of said first carrier signal, respectively; a first and a second filter for extracting a COS PN code chip signal and a SIN PN code chip signal from said COS component signal and said SIN component signal, respectively; first and second A/D-converting means for outputting A/D-converted signals corresponding to said COS PN code chip signal and said SIN PN code chip signal, respectively; a first digital correlator for correlating an output of said first A/D-converting means with a first reference signal; a second digital correlator for correlating an output of said second A/D-converting means with a second reference signal; steering gate means disposed between said first and said second filter on one side and said first and said second A/D-converting means on the other side, said steering gate means giving said first and said second A/D-converting means said COS PN code chip signal and said SIN PN code chip signal, respectively, with a predetermined timing according to a control signal; subtracting means for effecting a subtractraction between outputs of said first and said second digital correlator to output a signal corresponding to a result of the subtraction; comparing means for judging whether said signal corresponding to the result of the subtraction is within a predetermined region or not to output a judgment signal; and control means for controlling said steering gate means by controlling said control signal, based on a state of an output of said comparing means and said signal corresponding to the result of the subtraction.

Claim 3

A spread spectrum receiving device comprising: dividing and converting means, which divides a received signal into two parts, which are converted into a COS component signal and a SIN component signal by using a first carrier signal having a same frequency as a modulation frequency for said received signal and a second carrier signal having the same frequency and a phase different by π/2 from that of said first carrier signal, respectively; a first and a second filter for extracting a COS PN code chip signal and a SIN PN code chip signal from said COS component signal and said SIN component signal, respectively; first and second A/D-converting means for outputting A/D-converted signals corresponding to said COS PN code chip signal and said SIN PN code chip signal, respectively; a first digital correlator for correlating an output of said first A/D-converting means with a first reference signal; a second digital correlator for correlating an output of said second A/D-converting means with a second reference signal; steering gate means disposed between said first and said second filter on one side and said first and said second A/D-converting means on the other side, said steering gate means giving said first and said second A/D-converting means said COS PN code chip signal and said SIN PN code chip signal, respectively, with a predetermined timing according to a control signal; subtracting means for effecting a subtraction either between said outputs of said first and said second A/D-converting means or between outputs of said first and said second digital correlator to output a signal corresponding to a result of the subtraction; comparing means for judging whether said signal corresponding to the result of the subtraction is within a predetermined region or not to output a judgment signal; and control means for controlling said steering gate means by controlling said control signal, based on a state of an output of said comparing means and said signal corresponding to the result of the subtraction.

Claim 4

A spread spectrum receiving device comprising: dividing and converting means, which divides a received signal into two parts, which are converted into a COS component signal and a SIN component signal by using a first carrier signal having a same frequency as a modulation frequency for said received signal and a second carrier signal having the same frequency and a phase different by π/2 from that of said first carrier signal, respectively; a first and a second filter for extracting a COS PN code chip signal and a SIN PN code chip signal from said COS component signal and said SIN component signal, respectively; first and second A/D-converting means for outputting A/D-converted signals corresponding to said COS PN code chip signal and said SIN PN code chip signal, respectively; a first digital correlator for correlating an output of said first A/D-converting means with a first reference signal; a second digital correlator for correlating an output of said second A/D-converting means with a second reference signal; steering gate means disposed between said first and said second filter on one side and said first and said second A/D-converting means on the other side, said steering gate means giving said first and said second A/D-converting means said COS PN code chip signal and said SIN PN code chip signal, respectively, with a predetermined timing according to a control signal; subtracting means for effecting a subtraction either between said outputs of said first and said second A/D-converting means or between outputs of said first and said second digital correlator to output a signal corresponding to a result of the subtraction; comparing means for judging whether said signal corresponding to the result of the subtraction is within a predetermined region or not to output a judgment signal; and control means for controlling said steering gate means by controlling said control signal, based on a state of an output of said comparing means and said signal corresponding to the result of the subtraction.

Claim 5

A spread spectrum receiving device according to claim 1, wherein said steering gate means comprises: a first and a second steering gate, to which said COS PN code chip signal and said SIN PN code chip signal are supplied and which outputs selectively those chip signals according to a first control signal; a third steering gate, to which a first clock of normal phase having a period equal to a PN code chip width and a second clock, whose phase is shifted by π/2 with respect to that of said first clock, are inputted and which outputs them selectively according to a second control signal; a fourth steering gate, to which a third clock and a fourth clock having reverse phases with respect to said first and said second clock, respectively, are inputted, and which outputs selectively those clocks according to said second control signal; and a fifth and a sixth steering gate, to which outputs of said third and said fourth steering gate are supplied, and which output selectively those outputs according to a third control signal; wherein said first A/D-converting means A/D-converts an output of said first steering gate, using an output of said fifth steering gate as a sampling clock, and said second A/D-converting means A/D-converts an output of said second steering gate, using an output of said sixth steering gate as a sampling clock.

Claim 6

A spread spectrum receiving device according to claim 2, wherein said steering gate means comprises: a second steering gate, to which said COS PN code chip signal and said SIN PN code chip signal are inputted and which outputs selectively those chip signals according to a control signal; and a third and a fourth steering gate, to which a first and a second clock of positive phase reverse phase, respectively, having a period equal to a PN code chip width and which outputs them selectively according to another control signal; wherein said first A/D-converting means A/D-converts an output of said first steering gate, using an output of said third steering gate as a sampling clock, and said second A/D-converting means A/D-converts an output of said second steering gate, using an output of said fourth steering gate as a sampling clock.

Claim 7

A spread spectrum receiving device according to claim 4, wherein said received signal is gated, based on said control signal, to be given to said dividing and converting means.

Claim 8

A spread spectrum receiving device according to claim 2, wherein said steering gate means comprises: a first and a second steering gate, to which said COS PN code chip signal and said SIN PN code chip signal are supplied and which outputs selectively those chip signals according to a second control signal; and a third and a fourth steering gate, to which a first and a second clock of positive phase and reverse phase, respectively, having a period equal to a PN code chip width and which outputs them selectively according to a third control signal; wherein said first A/D-converting means A/D-converts an output of said first steering gate, using an output of said third steering gate as a sampling clock, and said second A/D-converting means A/D-converts an output of said second steering gate, using an output of said fourth steering gate as a sampling clock, and said subtracting means effects a subtraction between outputs of said first digital correlator and said second digital correlator.

Claim 9

A spread spectrum receiving device according to claim 6, wherein said received signal is gated, based on said control signal, to be given to said dividing and converting means.

Claim 10

A spread spectrum receiving device according to claim 1, wherein each of said steering gates includes at least three NAND gates and an inverter.

Claim 11

A spread spectrum receiving device according to claim 2, wherein each of said steering gates includes at least three NAND gates and an inverter.

Claim 12

A spread spectrum receiving device according to claim 1, wherein each of said digital correlators includes a first shift register, to which an output of each of the correlating means is given; a second shift register, to which a reference signal is given; a plurality of EX-NOR gates, to which outputs of different stages of the different shift registers are given; and an adding circuit, which adds outputs of said different EX-NOR gates.

Claim 13

A spread spectrum receiving device according to claim 2, wherein each of said digital correlators includes a first shift register, to which an output of each of the correlating means is given; a second shift register, to which a reference signal is given; a plurality of EX-NOR gates, to which outputs of different stages of the different shift registers are given; and an adding circuit, which adds outputs of said different EX-NOR gates.