US5283483A
Expired / Lapsed
US
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Slimmer circuit technique
Assignee: Fairchild Semiconductor Corp
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Filing: 1993-01-27
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Granted: 1994-02-01
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Expires: 2013-01-27
Abstract
Abstract A fast parasitic-insensitive continuous-time filter and equalizer integrated circuit that uses an active integrator is described. Circuit techniques for excess-phase cancellation, and for setting the corner-frequency of the filter and equalizer are also described. These techniques result in a filter and equalizer chip with performance independent of process, supply, and temperature without employing phase-lock loops. This 20MHz 6th order Bessel filter and 2nd order equalizer operate from 5V, and generate only 0.24% (-52 dB) of total harmonic distortion when processing 2 Vp-p differential output signals. The device is optimized to limit high-frequency noise and to amplitude equalize the data pulses in hard disk read-channel systems. The device supports data rates of up to 36 Mbps, and is built in a 1.5μ/4 GHz BiCMOS technology.
Inventors
- 👤 Carlos A. Laber
- 👤 Paul R. Gray
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 01:14
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/0422; H03H11/0466
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
93 words
A slimmer circuit for narrowing data pulses comprising: a. means for receiving a voltage signal having a characteristic; b. a circuit for forming a bandpass response signal for the voltage signal; c. a circuit for forming a lowpass response signal for the voltage signal; d. means for forming a second derivative of the bandpass response signal for forming a second derivative signal; e. means for amplifying the second derivative signal for forming an amplified signal; and f. means for subtracting the amplified signal from the lowpass response signal for forming a difference signal.
Claim 2
Dependent Claim
93 words
A slimmer circuit for narrowing data pulses comprising: a. means for receiving a voltage signal having a characteristic; b. a circuit for forming a bandpass response signal for the voltage signal; c. a circuit for forming a lowpass response signal for the voltage signal; d. means for forming a second derivative of the bandpass response signal for forming a second derivative signal; e. means for amplifying the second derivative signal for forming an amplified signal; and f. means for subtracting the amplified signal from the lowpass response signal for forming a difference signal.
Claim 3
Dependent Claim
19 words
The slimmer circuit according to claim 1 wherein the difference signal comprises a second-order approximation of a cosine equalizer.
Claim 4
Dependent Claim
24 words
The slimmer circuit according to claim 1 wherein the circuit includes five bit means for controlling the slimmer circuit for providing 32 slimming levels.
Claim 5
Dependent Claim
19 words
The slimmer circuit according to claim 1 wherein the means for forming a second derivative comprises an input capacitor.
Claim 6
Dependent Claim
44 words
The slimmer circuit according to claim 1 wherein the lowpass response signal comprises a transfer function according to the equation: ##EQU16## where Q is a quality factor and ω 0 is function of a transconductance of the circuit for forming the lowpass response signal.
Claim 7
Dependent Claim
58 words
The slimmer circuit according to claim 1 wherein the bandpass response signal comprises a transfer function according to the equation: ##EQU17## where Q is a quality factor and ω 0 is function of a transconductance of the circuit for forming the lowpass response signal and ω 2 =ω 0Q is the bandwidth of the second integrator. (FIG. 11)
Claim 8
Dependent Claim
247 words
A slimmer circuit for narrowing data pulses comprising: a. a differential amplifier having a positive input, a negative input, a positive output and a negative output; b. a first capacitor having a first terminal coupled to the positive input; c. a first current source coupled to the positive input; d. a second capacitor having a first terminal coupled to the negative input; e. a second current source coupled to the negative input; f. a first voltage signal coupled to a second terminal of the first capacitor and to a second terminal of the second capacitor; g. a first and a second n-channel MOS transistor having a gate coupled to the positive output of the amplifier and a source coupled to a circuit ground; h. a drain of the first transistor coupled to the positive input of the amplifier; i. a third and a fourth n-channel MOS transistor having a gate coupled to the negative output of the amplifier and a source coupled to a circuit ground; j. a drain of the third transistor coupled to the negative input of the amplifier; k. a differential transconductor having a positive input, a negative input, a positive output and a negative output; l. a second voltage signal coupled to the positive input and the negative input of the transconductor; m. a drain of the second transistor coupled to the positive output of the transconductor; and n. a drain of the fourth transistor coupled to the negative output of the transconductor.
Claim 9
Dependent Claim
247 words
A slimmer circuit for narrowing data pulses comprising: a. a differential amplifier having a positive input, a negative input, a positive output and a negative output; b. a first capacitor having a first terminal coupled to the positive input; c. a first current source coupled to the positive input; d. a second capacitor having a first terminal coupled to the negative input; e. a second current source coupled to the negative input; f. a first voltage signal coupled to a second terminal of the first capacitor and to a second terminal of the second capacitor; g. a first and a second n-channel MOS transistor having a gate coupled to the positive output of the amplifier and a source coupled to a circuit ground; h. a drain of the first transistor coupled to the positive input of the amplifier; i. a third and a fourth n-channel MOS transistor having a gate coupled to the negative output of the amplifier and a source coupled to a circuit ground; j. a drain of the third transistor coupled to the negative input of the amplifier; k. a differential transconductor having a positive input, a negative input, a positive output and a negative output; l. a second voltage signal coupled to the positive input and the negative input of the transconductor; m. a drain of the second transistor coupled to the positive output of the transconductor; and n. a drain of the fourth transistor coupled to the negative output of the transconductor.
Claim 10
Dependent Claim
22 words
The slimmer circuit according to claim 7 wherein an output of the slimmer circuit comprises a second-order approximation of a cosine equalizer.
Claim 11
Dependent Claim
24 words
The slimmer circuit according to claim 7 wherein the circuit includes five bit means for controlling the slimmer circuit for providing 32 slimming levels.
Claim 12
Dependent Claim
44 words
The slimmer circuit according to claim 9 wherein the first voltage signal comprises a transfer function according to the equation: ##EQU18## where Q is a quality factor and ω 0 is function of a transconductance of the circuit for forming the lowpass response signal.
Claim 13
Dependent Claim
44 words
The slimmer circuit according to claim 9 wherein the second voltage signal comprises a transfer function according to the equation: ##EQU19## where Q is a quality factor and ω 0 is function of a transconductance of the circuit for forming the lowpass response signal.
References Cited (Backward Citations)
JPH04294627A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-31 | 1997-08-02 | 1998-02-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-31 | 2001-08-02 | 2002-02-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-31 | 2005-08-02 | 2006-02-01 | $7700.00 | Window Closed / Lapsed |