Timing and automatic frequency control of digital receiver using the cyclic properties of a non-linear operation

Claim 1

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: demodulating the modulated digital signal, by mixing it with a local reference oscillator to provide a baseband signal; sampling the baseband signal to provide discrete-time, in-phase (I) and quadrature (Q) components thereof; performing a first non-linear operation on the I and Q components, to produce a first composite signal having a first phase component related to a symbol timing error and a second phase component related to a carrier frequency error; performing a second non-linear operation on the I and Q components, to produce a second composite signal having a first phase component related to the symbol timing error and a second phase component related to the negative of the carrier frequency error; detecting the symbol timing error by comparing the first and second composite signals; detecting the carrier frequency error by comparing the first and second composite signals; adjusting the time of subsequent sampling steps according to the detected symbol timing error; and adjusting the frequency of the I and Q components according to the detected carrier frequency error.

Claim 2

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: demodulating the modulated digital signal, by mixing it with a local reference oscillator to provide a baseband signal; sampling the baseband signal to provide discrete-time, in-phase (I) and quadrature (Q) components thereof; performing a first non-linear operation on the I and Q components, to produce a first composite signal having a first phase component related to a symbol timing error and a second phase component related to a carrier frequency error; performing a second non-linear operation on the I and Q components, to produce a second composite signal having a first phase component related to the symbol timing error and a second phase component related to the negative of the carrier frequency error; detecting the symbol timing error by comparing the first and second composite signals; detecting the carrier frequency error by comparing the first and second composite signals; adjusting the time of subsequent sampling steps according to the detected symbol timing error; and adjusting the frequency of the I and Q components according to the detected carrier frequency error.

Claim 11

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: taking samples of the modulated digital signal in synchronism with a local clock reference signal, to provide discrete time, in-phase (I) and quadrature (Q) components of the modulated digital signal; performing a first non-linear operation on the I and Q components, to produce a first composite signal having a first phase component related to a symbol timing error and a second phase component related to a carrier frequency error; performing a second non-linear operation on the I and Q components, to produce a second composite signal having a first phase component related to the symbol timing error and a second phase component related to the negative of the carrier frequency error; detecting the symbol timing error by comparing the first and second composite signals; detecting the carrier frequency error by comparing the first and second composite signals; and adjusting subsequent I and Q components by the steps of: adjusting the I and Q components by adjusting the timing of the local reference clock signal by an amount indicated by the symbol timing error; and adjusting the frequency of the I and Q components by multiplying the I and Q components by a sinusoid having a frequency equal to the detected carrier frequency error.

Claim 12

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: taking samples of the modulated digital signal in synchronism with a local clock reference signal, to provide discrete time, in-phase (I) and quadrature (Q) components of the modulated digital signal; performing a first non-linear operation on the I and Q components, to produce a first composite signal having a first phase component related to a symbol timing error and a second phase component related to a carrier frequency error; performing a second non-linear operation on the I and Q components, to produce a second composite signal having a first phase component related to the symbol timing error and a second phase component related to the negative of the carrier frequency error; detecting the symbol timing error by comparing the first and second composite signals; detecting the carrier frequency error by comparing the first and second composite signals; and adjusting subsequent I and Q components by the steps of: adjusting the I and Q components by adjusting the timing of the local reference clock signal by an amount indicated by the symbol timing error; and adjusting the frequency of the I and Q components by multiplying the I and Q components by a sinusoid having a frequency equal to the detected carrier frequency error.

Claim 13

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: generating a digital clock reference signal; taking samples of the modulated digital signal in synchronism with the local clock reference signal, to provide discrete time, in-phase (I) and quadrature (Q) components of the modulated digital signal; forming complex-valued signal components (S) by combining the I and Q components, with the I component being the real part of the complex-valued sample S, and the Q component being the imaginary part of the complex-valued sample S; introducing a phase shift in the complex-valued sample S to compensate for a frequency error, f o , in the digital clock reference signal, the phase shift being introduced by discrete-time multiplying the complex-valued sample S by a digital complex sinusoid having a complex frequency e -j (2π fe tn), where t n indicates discrete time; introducing a timing correction in the digital clock reference signal, by adjusting the time at which the samples are taken by an amount equal to a timing error, τ; estimating the frequency error, f o , and the timing error, τ, in the digital clock signal, by performing the steps of: multiplying each of the complex-valued samples, S, by a time-shifted and conjugated of itself, to provide a first correction signal, C + , having a first phase component related to the frequency error f o divided by a nominal interval T between successive samples, and also having a second phase component related to the negative ratio of the timing error τ and the sample interval T; multiplying each of the complex-valued samples, S, by a time-shifted and conjugated of itself, to provide a second correction signal, C - , having a first phase component related to the negative of the frequency error f o divided by the nominal interval T, and also having a second phase component related to the negative ratio of the timing error τ and the interval T between successive samples; detecting the timing error, τ, by multiplying the first correction signal C + by the second correction signal C - and determining the arc tangent thereof; and detecting the frequency error, f o , by multiplying the conjugate of the first correction signal C + by the second correction signal C - and determining the arc tangent thereof.

Claim 14

A method for correcting the symbol sampling time and carrier frequency error in a received modulated digital signal, comprising the steps of: generating a digital clock reference signal; taking samples of the modulated digital signal in synchronism with the local clock reference signal, to provide discrete time, in-phase (I) and quadrature (Q) components of the modulated digital signal; forming complex-valued signal components (S) by combining the I and Q components, with the I component being the real part of the complex-valued sample S, and the Q component being the imaginary part of the complex-valued sample S; introducing a phase shift in the complex-valued sample S to compensate for a frequency error, f o , in the digital clock reference signal, the phase shift being introduced by discrete-time multiplying the complex-valued sample S by a digital complex sinusoid having a complex frequency e -j (2π fe tn), where t n indicates discrete time; introducing a timing correction in the digital clock reference signal, by adjusting the time at which the samples are taken by an amount equal to a timing error, τ; estimating the frequency error, f o , and the timing error, τ, in the digital clock signal, by performing the steps of: multiplying each of the complex-valued samples, S, by a time-shifted and conjugated of itself, to provide a first correction signal, C + , having a first phase component related to the frequency error f o divided by a nominal interval T between successive samples, and also having a second phase component related to the negative ratio of the timing error τ and the sample interval T; multiplying each of the complex-valued samples, S, by a time-shifted and conjugated of itself, to provide a second correction signal, C - , having a first phase component related to the negative of the frequency error f o divided by the nominal interval T, and also having a second phase component related to the negative ratio of the timing error τ and the interval T between successive samples; detecting the timing error, τ, by multiplying the first correction signal C + by the second correction signal C - and determining the arc tangent thereof; and detecting the frequency error, f o , by multiplying the conjugate of the first correction signal C + by the second correction signal C - and determining the arc tangent thereof.