Composite semiconductor device with Schottky and pn junctions

Claim 2

A semiconductor device comprising: a first semiconductor region of a first conductivity type having a main surface; a second semiconductor region of a second conductivity type extending from a plurality of selected portions of said main surface into the inside of said first semiconductor region; a third semiconductor region of the second conductivity type extending from said main surface into the inside of said first semiconductor region and across adjacent portions of said second semiconductor region, said third semiconductor region having a depth smaller than that of said second semiconductor region; a plurality of fourth semiconductor regions of the second conductivity type separated from said second semiconductor region and extending from a plurality of portions of said main surface into the inside of said first semiconductor region; a plurality of fifth semiconductor regions of the first conductivity type extending from said main surface into the inside of each of said fourth semiconductor regions; a first electrode formed on said main surface so as to form an ohmic junction with said second semiconductor region, said fourth semiconductor regions and said fifth semiconductor regions, and to form a Schottky junction with said third semiconductor region; a second electrode provided so as to form an ohmic junction with said first semiconductor region; and a gate electrode formed on an insulating film to extend over said main surface of said first semiconductor region, said fourth semiconductor regions and said fifth semiconductor region.

Claim 3

A semiconductor device according to claim 1, in which when a forward current with a current density J F is passed between said first and second electrodes, the relation ##EQU3## is established in a forward voltage V F range of 0.1 (V) to 0.3 (V), where K represents the Boltzmann constant, and q represents the quantity of electron charges, and t represents the absolute temperature.

Claim 4

A semiconductor device comprising: a semiconductor substrate having a pair of main surfaces; a first semiconductor region of a first conductivity type extending from one main surface of said semiconductor substrate into the inside of the substrate; a second semiconductor region of said first conductivity type adjacent to the other main surface of said semiconductor substrate and said first semiconductor region, and having an impurity concentration lower than that of said first semiconductor region; a plurality of third semiconductor regions of a second conductivity type extending from the other main surface of said semiconductor substrate into the inside of said second semiconductor region; a plurality of fourth semiconductor regions of said first conductivity type extending from the other main surface of said semiconductor substrate into the inside of each said third semiconductor region; a plurality of fifth semiconductor regions of the second conductivity type extending by a depth smaller than that of said third semiconductor region from said other surface of said semiconductor substrate into the inside of said second semiconductor region being adjacent to said third semiconductor region and having an impurity concentration lower than that of said third semiconductor region at selected portions of mutual intervals adjacent said third semiconductor regions; a first electrode provided at one main surface of said semiconductor substrate so as to be in ohmic junction with said first semiconductor region; a second electrode provided at the other main surface of said semiconductor substrate so as to be in ohmic contact with said third and said fourth semiconductor regions and to be in contact through a Schottky barrier with at least one of said fifth semiconductor regions of the second conductivity type; and a gate electrode formed on an insulating film to be over said semiconductor regions which are exposed among non-selected portions of mutual intervals adjacent to said third semiconductor regions and over said third and said fourth semiconductor regions adjacent to said second semiconductor at the other main surface of said semiconductor substrate.

Claim 5

A semiconductor device comprising: a semiconductor substrate having a pair of main surfaces; a first semiconductor region of a first conductivity type extending from one main surface of said semiconductor substrate into the inside of the substrate; a second semiconductor region of said first conductivity type adjacent to the other main surface of said semiconductor substrate and said first semiconductor region, and having an impurity concentration lower than that of said first semiconductor region; a plurality of third semiconductor regions of a second conductivity type extending from the other main surface of said semiconductor substrate into the inside of said second semiconductor region; a plurality of fourth semiconductor regions of said first conductivity type extending from the other main surface of said semiconductor substrate into the inside of each said third semiconductor region; a plurality of fifth semiconductor regions of the second conductivity type extending by a depth smaller than that of said third semiconductor region from said other surface of said semiconductor substrate into the inside of said second semiconductor region being adjacent to said third semiconductor region and having an impurity concentration lower than that of said third semiconductor region at selected portions of mutual intervals adjacent said third semiconductor regions; a first electrode provided at one main surface of said semiconductor substrate so as to be in ohmic junction with said first semiconductor region; a second electrode provided at the other main surface of said semiconductor substrate so as to be in ohmic contact with said third and said fourth semiconductor regions and to be in contact through a Schottky barrier with at least one of said fifth semiconductor regions of the second conductivity type; and a gate electrode formed on an insulating film to be over said semiconductor regions which are exposed among non-selected portions of mutual intervals adjacent to said third semiconductor regions and over said third and said fourth semiconductor regions adjacent to said second semiconductor at the other main surface of said semiconductor substrate.

Claim 6

A semiconductor device according to claim 1, in which when a forward current with a current density J F is passed between said first and second electrodes, the relation ##EQU4## is established in a forward voltage V F range of 0.1 (V) to 0.3 (V) where K represents the Boltzmann constant, and q represents the quantity of electron charges, and T represents the absolute temperature.