Optimized clock recovery for an MSK system

Claim 2

An MSK encoder-transmitter comprising: MSK generating means for generating an MSK digitally modulated data signal having a bit rate (f b ), the MSK digitally modulated data signal so modulated with binary information as to inherently produce a spectral null (f n ) in its audio frequency spectrum at 1/2 the bit rate, wherein f n =f b /2, the data signal containing binary data, having a bit edge occurring at the bit rate, each bit represented by one of two signaling tones, representing a mark or a space, with a plurality of successive bit edges occurring after each bit period (T b =1/f b ), whereby each of the bit edges occurs at the rate f b ; means for generating a synchronization signal, in the audio spectrum, having a synchronization frequency (f s ) at 1/2 the bit rate, the frequency at 1/2 the bit rate corresponding to the spectral null of the MSK digitally modulated data signal, wherein f s =f b /2, the synchronization signal having two successive zero-crossings for each synchronization period (T s =1/f s =2/f b =2T b ), each of the zero-crossings occurring at every half period (T s /2=2T b /2=Tb) of the synchronization period or every full period of the bit period Tb; means for injecting in the MSK digitally modulated data signal the synchronization signal within the null to provide a composite data signal, composed of the sum of the MSK digitally modulated data signal and the synchronization signal, for use by receivers; and means for transmitting a radio frequency signal having a radio frequency carrier signal modulated with the composite data signal, wherein the synchronization frequency is not a function of the transmitted radio frequency signal.

Claim 3

An MSK decoder-receiver comprising: MSK receiving means for receiving an MSK digitally modulated data signal at a bit rate (f b ), together with a synchronization signal, having a synchronization frequency (f s ) at a spectral null (f n ) of the data signal, at 1/2 the bit rate, wherein f n =f b /2, wherein f s =f b /2, wherein f s =f b /2, the data signal containing binary data, occurring at the bit rate, each bit represented by one of two signaling tones, representing a mark or a space, with a plurality of successive bit edges occurring after each bit period (T b =1/f b ), whereby each of the bit edges occurs at the bit rate f b , and the synchronization signal having two successive zero-crossings for each synchronization period (T s =1/f s =2/f b =2T b ), each of the zero-crossings occurring at every half period (T s /2=2T b /2=T b ) of the synchronization period or every full period of the bit period Tb; means for recovering the synchronization signal to detect a time occurrence of each zero-crossing of the synchronization signal at T s /2=T b ; and bit alignment means for demodulating the MSK digitally modulated data signal as a function of the synchronization signal by referencing the time occurrence of each zero-crossing of the synchronization signal at T s /2=T b as one of the successive bit edges of the data signal, whereby the bit between two successive bit edges, occurring during the bit period (T b ) can be sampled to determined whether the tone represents the mark or the space.

Claim 4

An MSK decoder-receiver comprising: MSK receiving means for receiving an MSK digitally modulated data signal at a bit rate (f b ), together with a synchronization signal, having a synchronization frequency (f s ) at a spectral null (f n ) of the data signal, at 1/2 the bit rate, wherein f n =f b /2, wherein f s =f b /2, wherein f s =f b /2, the data signal containing binary data, occurring at the bit rate, each bit represented by one of two signaling tones, representing a mark or a space, with a plurality of successive bit edges occurring after each bit period (T b =1/f b ), whereby each of the bit edges occurs at the bit rate f b , and the synchronization signal having two successive zero-crossings for each synchronization period (T s =1/f s =2/f b =2T b ), each of the zero-crossings occurring at every half period (T s /2=2T b /2=T b ) of the synchronization period or every full period of the bit period Tb; means for recovering the synchronization signal to detect a time occurrence of each zero-crossing of the synchronization signal at T s /2=T b ; and bit alignment means for demodulating the MSK digitally modulated data signal as a function of the synchronization signal by referencing the time occurrence of each zero-crossing of the synchronization signal at T s /2=T b as one of the successive bit edges of the data signal, whereby the bit between two successive bit edges, occurring during the bit period (T b ) can be sampled to determined whether the tone represents the mark or the space.

Claim 5

A clock recovery system for radio communication, the system comprising: an MSK encoder-transmitter comprising: MSK generating means for generating an MSK digitally modulated data signal having a bit rate (f b ) and an inherent spectral null (f n ) at 1/2 the bit rate, wherein f n =f b /2, the data signal containing binary data, occurring at the bit rate (f b ), each bit represented by one of two signaling tones, having one of two possible values, with a plurality of successive bit edges, occurring after each bit period (T b =1/f b ); means for generating a synchronization signal, in the audio spectrum, having a frequency at 1/2 the bit rate, the frequency at 1/2 the bit rate corresponding to the spectral null of the MSK digitally modulated data signal, wherein f s =f b /2, the synchronization signal having two successive zero-crossings for each synchronization period (T s =1/f s =2/f b =2T b ), each of the zero-crossings occurring at every half period (T s /2=2T b /2=T b ) of the synchronization period or every full period of the bit period Tb; and means for transmitting the synchronization signal, at the spectral null of the data signal, together with the MSK digitally modulated data signal, at the bit rate, to compose a composite MSK digitally modulated data signal for modulating a radio frequency signal that is to be transmitted, wherein the frequency of the synchronization signal, f s =f b /2, is not a function of the transmitted radio frequency signal; and an MSK receiver comprising: MSK receiving means for receiving the MSK digitally modulated data signal at the bit rate, together with the synchronization signal at the spectral null of the data signal, at 1/2 the bit rate; means for recovering the synchronization signal to detect a time occurrence of each zero-crossing of the synchronization signal at T s /2=T b ; and bit alignment means for demodulating the MSK digitally modulated data signal as a function of the synchronization signal by referencing the time occurrence of each zero-crossing of the synchronization signal at T s /2=T b as one of the successive bit edges of the data signal, whereby the bit between two successive bit edges, occurring during the bit period (T b ) can be sampled to determine its value.

Claim 6

A clock recovery system for radio communication, the system comprising: an MSK encoder-transmitter comprising: MSK generating means for generating an MSK digitally modulated data signal having a bit rate (f b ) and an inherent spectral null (f n ) at 1/2 the bit rate, wherein f n =f b /2, the data signal containing binary data, occurring at the bit rate (f b ), each bit represented by one of two signaling tones, having one of two possible values, with a plurality of successive bit edges, occurring after each bit period (T b =1/f b ); means for generating a synchronization signal, in the audio spectrum, having a frequency at 1/2 the bit rate, the frequency at 1/2 the bit rate corresponding to the spectral null of the MSK digitally modulated data signal, wherein f s =f b /2, the synchronization signal having two successive zero-crossings for each synchronization period (T s =1/f s =2/f b =2T b ), each of the zero-crossings occurring at every half period (T s /2=2T b /2=T b ) of the synchronization period or every full period of the bit period Tb; and means for transmitting the synchronization signal, at the spectral null of the data signal, together with the MSK digitally modulated data signal, at the bit rate, to compose a composite MSK digitally modulated data signal for modulating a radio frequency signal that is to be transmitted, wherein the frequency of the synchronization signal, f s =f b /2, is not a function of the transmitted radio frequency signal; and an MSK receiver comprising: MSK receiving means for receiving the MSK digitally modulated data signal at the bit rate, together with the synchronization signal at the spectral null of the data signal, at 1/2 the bit rate; means for recovering the synchronization signal to detect a time occurrence of each zero-crossing of the synchronization signal at T s /2=T b ; and bit alignment means for demodulating the MSK digitally modulated data signal as a function of the synchronization signal by referencing the time occurrence of each zero-crossing of the synchronization signal at T s /2=T b as one of the successive bit edges of the data signal, whereby the bit between two successive bit edges, occurring during the bit period (T b ) can be sampled to determine its value.

Claim 7

The clock recovery system of claim 3 wherein the means for transmitting includes transmitter filtering means.

Claim 8

The clock recovery system of claim 4 further comprises: delaying means, in the MSK encoder-transmitter, for delaying the synchronization signal, generated by the MSK encoder-transmitter, with respect to the MSK digitally modulated data signal to compensate for the phase distortion of the transmitter filtering means.

Claim 9

The clock recovery system of claim 3 wherein the means for receiving includes receiver filtering means comprising: a notch filter for filtering out the synchronization signal f s =f b /2 from the recovered data signal to provide the data bits; and a bandpass filter, operating around the synchronization frequency to retrieve the synchronization frequency to synchronize the data bits by aligning the zero-crossings of the synchronization signal with the bit edges of the data bits.

Claim 10

The clock recovery system of claim 6 further comprising: delaying means for delaying the synchronization signal, recovered by the MSK receiver, with respect to the MSK digitally modulated data signal to compensate for the phase distortion of the receiver filtering means.

Claim 11

The clock recovery system of claim 3 wherein the means for demodulating comprises a matched filter.

Claim 12

The clock recovery system of claim 3 further comprising: in the MSK receiver: means for muting an audio speaker means in response to detecting the synchronization signal.

Claim 13

The clock recovery system of claim 3 wherein the means for transmitting comprises summing means for summing the synchronization signal and the MSK digitally modulated data signal.