US5268949A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for generating M-sequence pseudo-random pattern
Assignee: Ando Electric Co Ltd
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Filing: 1992-08-31
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Granted: 1993-12-07
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Expires: 2012-08-31
Abstract
Abstract The present invention provides a MRP generator comprising m MRP generating circuits connected in parallel which are operated at a 1/m clock speed and have a predetermined time relation to each other, wherein the MRP generating circuits are operated on the multiplex basis. The operating speed is improved.
Inventors
- 👤 Hirobumi Watanabe
- 👤 Hiroshi Nagai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 17:03
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/84
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
191 words
A MRP (M-sequence random pattern) generator circuit which comprises m MRP pattern generating circuits, each comprising a shift register and an EXOR gate as a feedback loop of the shift register, the m MRP pattern generating circuits being connected in parallel at their outputs and the time relation between said outputs of the m MRP pattern generating circuits, on an assumption that the pattern cycle of each of the MRP generating circuits is 360 degrees, being set at Δθ=360/m and initial values for the m MRP pattern generating circuits being sequentially distanced by Δθ from one to the next, wherein each said shift register is connected to a set circuit for setting the initial value for each said shift register, each said register contains a plurality of flip-flops, said EXOR gate is connected to selected ones of the outputs of the flip-flops, said set circuit is connected to a selected one of the inputs of a plurality of OR gates connected to set inputs of said flip-flops and said flip-flops are connected to the other inputs of the OR gates, the OR gates being connected at their outputs to subsequent flip-flops.
Claim 2
Dependent Claim
191 words
A MRP (M-sequence random pattern) generator circuit which comprises m MRP pattern generating circuits, each comprising a shift register and an EXOR gate as a feedback loop of the shift register, the m MRP pattern generating circuits being connected in parallel at their outputs and the time relation between said outputs of the m MRP pattern generating circuits, on an assumption that the pattern cycle of each of the MRP generating circuits is 360 degrees, being set at Δθ=360/m and initial values for the m MRP pattern generating circuits being sequentially distanced by Δθ from one to the next, wherein each said shift register is connected to a set circuit for setting the initial value for each said shift register, each said register contains a plurality of flip-flops, said EXOR gate is connected to selected ones of the outputs of the flip-flops, said set circuit is connected to a selected one of the inputs of a plurality of OR gates connected to set inputs of said flip-flops and said flip-flops are connected to the other inputs of the OR gates, the OR gates being connected at their outputs to subsequent flip-flops.
Claim 3
Dependent Claim
36 words
A MRP generator according to claim 1 wherein a select circuit is provided to selectively enable the set circuit to input the initial values in the registers of the MRP generation circuits to generated the MRP.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-12-06 | 1997-06-07 | 1997-12-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-12-06 | 2001-06-07 | 2001-12-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-12-06 | 2005-06-07 | 2005-12-07 | $7700.00 | Window Closed / Lapsed |