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US5266829A Expired / Lapsed US ⏱️ 0.0 years remaining

Electrically-programmable low-impedance anti-fuse element

Assignee: Microsemi SoC Corp
•
Filing: 1992-07-08
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Granted: 1993-11-30
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Expires: 2012-07-08
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Abstract

Abstract Electrically-programmable low-impedance anti-fuses are disclosed having capacitor-like structure with very low leakage before programming and a low resistance after programming. The electrically-programmable low-impedance antifuses of the present invention include a first conductive electrode which may be formed as a diffusion region in a semiconductor substrate or may be formed from a semiconductor material, such as polysilicon, located above and insulated from the substrate. A dielectric layer, which, in a preferred embodiment includes a first layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide, is disposed over the first electrode. A second electrode is formed over the dielectric layer from a semiconductor material such as polysilicon, or a metal having a barrier metal underneath. At least one of the two electrodes of each anti-fuse is highly-doped or implanted with arsenic such that high concentrations of arsenic exist at the interface between the electrode and the dielectric layer. This arsenic will combine with other material and flow into the anti-fuse filament after programmed to form a low resistance controllable anti-fuse link. Circuitry is provided which allows the anti-fuse of the present invention to be programmed by application of a suitable programming voltage to input-output pins of the integrated circuit containing the antifuse. Where more than one anti-fuse is to be programmed using the programming voltage applied at the input-output terminals, other additional input-output terminals may serve as address inputs to specify the anti-fuse to be programmed.

Inventors

  • 👤 Esmat Z. Hamdy
  • 👤 Amr M. Mohsen
  • 👤 John L. McCullum
  • 👤 Shih-ou Chen
  • 👤 Steve S. Chiang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 16:20
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 106 words
An electrically-programmable, low-impedance antifuse element disposed in an integrated circuit, including: a first electrode comprising a region in said integrated circuit containing arsenic at a concentration of between about 1×10 19 to 1×10 22 atoms/cm 3 , said region having an arsenic pileup doping profile; a dielectric layer disposed over said first electrode, said dielectric layer comprising a first layer of silicon dioxide disposed over said lower electrode, a second layer of silicon nitride disposed over said first layer, and a third layer of silicon dioxide disposed over said second layer; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 2
Dependent Claim 106 words
An electrically-programmable, low-impedance antifuse element disposed in an integrated circuit, including: a first electrode comprising a region in said integrated circuit containing arsenic at a concentration of between about 1×10 19 to 1×10 22 atoms/cm 3 , said region having an arsenic pileup doping profile; a dielectric layer disposed over said first electrode, said dielectric layer comprising a first layer of silicon dioxide disposed over said lower electrode, a second layer of silicon nitride disposed over said first layer, and a third layer of silicon dioxide disposed over said second layer; and a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 3
Dependent Claim 27 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein the arsenic concentration of said second electrode is between about 1×10 19 to 1×10 22 atoms/cm 3 .
Claim 4
Dependent Claim 16 words
The electrically-programmable, low-impedance antifuse element of claim 1 wherein said region is ion implanted with arsenic.
Claim 5
Dependent Claim 86 words
An electrically-programmable, low-impedance antifuse element disposed in a microcircuit, including: a first electrode disposed on an insulating layer, said first electrode comprising a layer of polysilicon; a dielectric layer disposed over said first electrode, said dielectric layer comprising a first layer of silicon dioxide disposed over said lower electrode, a second layer of silicon nitride disposed over said first layer, and a third layer of silicon dioxide disposed over said second layer; a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 6
Dependent Claim 86 words
An electrically-programmable, low-impedance antifuse element disposed in a microcircuit, including: a first electrode disposed on an insulating layer, said first electrode comprising a layer of polysilicon; a dielectric layer disposed over said first electrode, said dielectric layer comprising a first layer of silicon dioxide disposed over said lower electrode, a second layer of silicon nitride disposed over said first layer, and a third layer of silicon dioxide disposed over said second layer; a second electrode comprising a layer of arsenic-containing polysilicon disposed over said dielectric layer.
Claim 7
Dependent Claim 27 words
The electrically-programmable, low-impedance antifuse element of claim 4 wherein the arsenic concentration in said second electrode is between about 1×10 19 to 1×10 22 atoms/cm 3 .

References Cited (Backward Citations)

JPS5828750A Cited
JPS6074669A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-29 1997-05-31 1997-11-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-29 2001-05-31 2001-11-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-29 2005-05-31 2005-11-30 $7700.00 Window Closed / Lapsed

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