Monitoring control flow in a microprocessor

Claim 1

In an integrated circuit microprocessor that executes a sequence of instructions, each instruction in turn causing execution by the microprocessor of a corresponding sequence of microprogram instructions by the microprocessor, the microprocessor having an external interface, the improvement comprising apparatus for monitoring the sequence of instructions executed by the microprocessor, the apparatus comprising means for activating an interface signal which indicates whether an instruction beginning execution by the microprocessor is a sequential instruction or a non-sequential instruction and means for providing information on the external interface which indicates when a taken branch or jump instruction is executed by the microprocessor or an exception occurs.

Claim 11

A method of monitoring the sequence of instructions executed by an integrated circuit microprocessor having an external interface and wherein each instruction in turn causes execution by the microprocessor of a corresponding sequence of microprogram instructions by the microprocessor, the method comprising generating an interface signal which indicates whether an instruction beginning execution by the microprocessor is a sequential instruction or a non-sequential instruction; and providing information on the external interface which indicates when a taken branch instruction is executed or an exception occurs.

Claim 12

A method of monitoring the sequence of instructions executed by an integrated circuit microprocessor having an external interface and wherein each instruction in turn causes execution by the microprocessor of a corresponding sequence of microprogram instructions by the microprocessor, the method comprising generating an interface signal which indicates whether an instruction beginning execution by the microprocessor is a sequential instruction or a non-sequential instruction; and providing information on the external interface which indicates when a taken branch instruction is executed or an exception occurs.

Claim 18

A method for monitoring the sequence of instructions executed by a central processing unit having an external interface, the method comprising: (a) generating an interface signal representative of the execution of a branch instruction, the interface signal being of a first state if the branch is taken and being of a second state if the branch is not taken and (i) if the interface signal is of the first state, transferring central processing unit control to a destination instruction having an address calculated using encoding and address information of the branch instruction; and (ii) if the interface signal is of the second state, transferring central processing unit control to the next sequential instruction following the branch instruction; and (b) displaying information on the interface representative of the execution of a taken jump instruction or the occurrence of an exception such that (i) when an exception occurs, a code is displayed indicating the type of exception and the memory location of an associated exception service procedure; and (ii) when a taken jump instruction is executed, the memory location of the jump destination instruction is displayed.

Claim 19

A method for monitoring the sequence of instructions executed by a central processing unit having an external interface, the method comprising: (a) generating an interface signal representative of the execution of a branch instruction, the interface signal being of a first state if the branch is taken and being of a second state if the branch is not taken and (i) if the interface signal is of the first state, transferring central processing unit control to a destination instruction having an address calculated using encoding and address information of the branch instruction; and (ii) if the interface signal is of the second state, transferring central processing unit control to the next sequential instruction following the branch instruction; and (b) displaying information on the interface representative of the execution of a taken jump instruction or the occurrence of an exception such that (i) when an exception occurs, a code is displayed indicating the type of exception and the memory location of an associated exception service procedure; and (ii) when a taken jump instruction is executed, the memory location of the jump destination instruction is displayed.