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US5260643A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable reference voltage generator

Assignee: National Semiconductor Corp
•
Filing: 1992-07-16
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Granted: 1993-11-09
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Expires: 2012-07-16
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Abstract

Abstract A programmable reference voltage generator includes a diode arrangement for generating a reference voltage in response to a control current. An array of memory cells is provided for adjusting the control current, the memory cell array including a plurality of memory cells connected to the diode arrangement through a plurality of current paths. Each of the memory cells is disposed to conduct current when programmed to store a first binary value, and to not conduct current when programmed to store a second binary value. A programming circuit is used to store a selected one of the first and second binary values in each memory cell, thereby causing the reference voltage to assume a selected magnitude.

Inventors

  • 👤 Bal S. Sandhu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 22:19
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/468

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 81 words
A programmable reference voltage generator comprising: a voltage divider having a plurality of circuit components connected in series between upper and lower power supply nodes, said voltage divider generating a reference voltage at a node connecting two of said plurality of circuit components; and current adjustment means, coupled to said voltage divider, for conducting current in parallel with a portion of said voltage divider wherein magnitude of said conducted current is determined by information stored within a plurality of memory cells.
Claim 2
Dependent Claim 81 words
A programmable reference voltage generator comprising: a voltage divider having a plurality of circuit components connected in series between upper and lower power supply nodes, said voltage divider generating a reference voltage at a node connecting two of said plurality of circuit components; and current adjustment means, coupled to said voltage divider, for conducting current in parallel with a portion of said voltage divider wherein magnitude of said conducted current is determined by information stored within a plurality of memory cells.
Claim 3
Dependent Claim 56 words
The programmable reference voltage generator of claim 1 further including a current-limiting transistor connected to each of said memory cells, said current-limiting transistor having control terminal upon which is impressed a current-limiting control voltage, and compensation circuit means for synthesizing said current-limiting control voltage, said compensation circuit means including a first transistor of a first polarity.
Claim 4
Dependent Claim 65 words
The programmable reference voltage generator of claim 2 wherein one of said circuit components within said voltage divider comprises a second transistor of said first polarity for supplying current to said voltage divider; whereby variation in transistor fabrication processing affects current-sourcing characteristics of said first and second transistors in like manner, thereby rendering magnitude of said current-limiting control voltage substantially immune from said processing variation.
Claim 5
Dependent Claim 110 words
A programmable reference voltage generator comprising: diode means for generating a reference voltage in response to a control current; memory cell means for adjusting said control current, said memory cell means including a plurality of memory cells connected to said diode means through a plurality of current paths wherein each of said memory cells is disposed to conduct current when programmed to store a first binary value and to not conduct current when programmed to store a second binary value; and means for programming each of said memory cells to a selected one of said first and second binary states, thereby causing said reference voltage to assume a selected magnitude.
Claim 6
Dependent Claim 110 words
A programmable reference voltage generator comprising: diode means for generating a reference voltage in response to a control current; memory cell means for adjusting said control current, said memory cell means including a plurality of memory cells connected to said diode means through a plurality of current paths wherein each of said memory cells is disposed to conduct current when programmed to store a first binary value and to not conduct current when programmed to store a second binary value; and means for programming each of said memory cells to a selected one of said first and second binary states, thereby causing said reference voltage to assume a selected magnitude.
Claim 7
Dependent Claim 25 words
The programmable reference voltage generator of claim 4 wherein said memory cell means includes current-limiting transistor means for limiting current conducted by said memory cells.
Claim 8
Dependent Claim 61 words
The programmable reference voltage generator of claim 5 wherein said current-limiting transistor means includes: a current-limiting transistor connected to each of said memory cells, said current-limiting transistor having a control terminal upon which is impressed a current-limiting control voltage, and compensation circuit means for synthesizing said current-limiting control voltage, said compensation circuit means including a first transistor of a first polarity.
Claim 9
Dependent Claim 70 words
The programmable reference voltage generator of claim 6 further including current source means for supplying current to said diode means and to said memory cell means, said current source means including a second transistor of said first polarity; whereby variation in transistor fabrication processing affects current-sourcing characteristics of said first and second transistors in like manner, thereby rendering magnitude of said current-limiting control voltage substantially immune from said processing variation.
Claim 10
Dependent Claim 17 words
The voltage generator of claim 7 wherein each of said memory cells comprises an EEPROM memory cell.
Claim 11
Dependent Claim 27 words
The voltage generator of claim 4 wherein said programming means further includes a transistor isolation network for open-circuiting said current paths during programming of said memory cells.
Claim 12
Dependent Claim 39 words
The voltage generator of claim 6 wherein said current-limiting control voltage is selected such that said current-limiting transistor becomes operative in a saturation mode when at least one of said memory cells is programmed in said first binary state.
Claim 13
Dependent Claim 122 words
In a voltage generator circuit having a diode arrangement operatively connected to a plurality of memory cells by a plurality of current paths, a method for generating a programmed reference voltage across said diode arrangement comprising the steps of: providing a control current to said diode arrangement; adjusting said control current by connecting a plurality of memory cells to said diode arrangement wherein each of said memory cells is disposed to conduct current when programmed to store a first binary value and to not conduct current when programmed to store a second binary value; and programming each of said memory cells to a selected one of said first and second binary states, thereby causing said reference voltage to assume a selected magnitude.
Claim 14
Dependent Claim 122 words
In a voltage generator circuit having a diode arrangement operatively connected to a plurality of memory cells by a plurality of current paths, a method for generating a programmed reference voltage across said diode arrangement comprising the steps of: providing a control current to said diode arrangement; adjusting said control current by connecting a plurality of memory cells to said diode arrangement wherein each of said memory cells is disposed to conduct current when programmed to store a first binary value and to not conduct current when programmed to store a second binary value; and programming each of said memory cells to a selected one of said first and second binary states, thereby causing said reference voltage to assume a selected magnitude.
Claim 15
Dependent Claim 46 words
The method of claim 11 further including the step of limiting said current conducted by said memory cells programmed to store said first binary value such that said reference voltage is altered in a predetermined manner as a function of said programming of said memory cells.

References Cited (Backward Citations)

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US4644250A Cited
JPS60220412A Cited
US4754167A Cited
US4961045A Cited
JPH03288217A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-08 1997-05-10 1997-11-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-08 2001-05-10 2001-11-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-08 2005-05-10 2005-11-09 $7700.00 Window Closed / Lapsed

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