US5258932A
Expired / Lapsed
US
⏱️ 0.0 years remaining
PLA simulation method
Assignee: Fujitsu Ltd
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Filing: 1991-09-13
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Granted: 1993-11-02
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Expires: 2011-09-13
Abstract
Abstract In logical simulation, required data amounts to a large volume when PLAs are used for circuit design. The present invention compresses PLA data for use in logical simulation and reduce necessary data volume. According to the PLA simulation method, PLA data are compressed by using at least one multiple input/output PLA and the output of the PLA is simulated according the compressed data.
Inventors
- 👤 Kazuhiro Matsuzaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 21:48
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/33
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
50 words
A programmable logic array (PLA) simulation method in a logic simulation system for performing logical simulation of a circuit, comprising the steps of: compressing PLA data using at least one multiple input/output PLA to provide compressed data, and simulating an output value of said PLA according to said compressed data.
Claim 2
Dependent Claim
50 words
A programmable logic array (PLA) simulation method in a logic simulation system for performing logical simulation of a circuit, comprising the steps of: compressing PLA data using at least one multiple input/output PLA to provide compressed data, and simulating an output value of said PLA according to said compressed data.
Claim 3
Dependent Claim
47 words
A PLA simulation device in a logical simulation system for performing logic simulation of a circuit; said unit comprising: means for compressing PLA data using at least one multiple input/output PLA and; a simulation means for performing logic simulation on said PLA according to the compressed data.
Claim 4
Dependent Claim
47 words
A PLA simulation device in a logical simulation system for performing logic simulation of a circuit; said unit comprising: means for compressing PLA data using at least one multiple input/output PLA and; a simulation means for performing logic simulation on said PLA according to the compressed data.
Claim 5
Dependent Claim
43 words
A PLA simulation device according to claim 2, wherein said compressed data in a multiple input/output PLA are at least one group of either those where any output among multiple output comprises 1 or those where any output among multiple output comprises 0.
Claim 6
Dependent Claim
48 words
A PLA simulation device according to claim 2, wherein said compressed data in a multiple input/output PLA are a data group whichever comprises smaller data volume between a group where any output among multiple output comprises 1 or a group where any output among multiple output comprises 0.
Claim 7
Dependent Claim
51 words
A PLA simulation device in a logic simulation system for designing a circuit comprising: a logical compression means for logically compressing data in a multiple input/output PLA as a pre-processor; and a logic simulation means for simulating a PLA output value according to PLA data compressed by said logic simulation means.
Claim 8
Dependent Claim
51 words
A PLA simulation device in a logic simulation system for designing a circuit comprising: a logical compression means for logically compressing data in a multiple input/output PLA as a pre-processor; and a logic simulation means for simulating a PLA output value according to PLA data compressed by said logic simulation means.
Claim 9
Dependent Claim
57 words
A PLA simulation device according to claim 5, wherein said logical compression means compresses data by extracting at least one of either a data group comprising an output value of 1 in any output data array in multiple outputs, or a data group comprising an output value of 0 in any output data array in multiple outputs.
Claim 10
Dependent Claim
33 words
A PLA simulation device according to claim 6, wherein said logic simulation means selects one of said data groups `on cover` and `off cover` extracted from PLA data whichever comprises smaller data volume.
Claim 11
Dependent Claim
52 words
A PLA simulation device according to claim 6, wherein said logical simulation means determines an output value of a PLA according to the compressed PLA data `on cover` or `off cover` extracted by said logical compression means and according to the inclusive relation ship between an input data array and PLA data.
Claim 12
Dependent Claim
99 words
A PLA simulation device according to claim 6, wherein said logic simulation means, when PLA data are an `on cover` data group, sets an output value to 1 according to said `on cover` data if input data array is contained in an `on cover` data group; sets an output value to uncertain according to said `on cover` data group if input data array crosses an `on cover` data group or input data array contains an `on cover` data group; and sets an output value to 0 if input data array is not associated with an `on cover` data group.
Claim 13
Dependent Claim
99 words
A PLA simulation device according to claim 6, wherein said logic simulation means, when PLA data are an `off cover` data group, sets an output value to 0 according to said `off cover` data if input data array is contained in an `off cover` data group; sets an output value to uncertain according to said `off cover` data group if input data array crosses an `off cover` data group or input data array contains an `off cover` data group; and sets an output value to 1 if input data array is not associated with an `off cover` data group.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-11-01 | 1997-05-03 | 1997-11-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-01 | 2001-05-03 | 2001-11-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-01 | 2005-05-03 | 2005-11-02 | $7700.00 | Window Closed / Lapsed |