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US5257271A Expired / Lapsed US ⏱️ 0.0 years remaining

Sample data transmission apparatus

Assignee: Sony Corp
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Filing: 1992-09-01
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Granted: 1993-10-26
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Expires: 2012-09-01
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Abstract

Abstract In a sampled data transmitting apparatus in which the sampled data to be transmitted are divided into odd-numbered samples and even-numbered samples and arranged in different rows of a two-dimensional data array, and in which error correction codes are annexed to each row and to each column of the two-dimensional data array, the row arraying sequence in one of the odd-numbered or even-numbered rows is caused to differ from the row arraying sequence in the other of the odd-numbered or even-numbered rows so that odd-numbered data and even-numbered data continuous with the odd-numbered data are not arranged in one row. In this manner, even when error correction becomes impossible by the error correcting code for one row, interpolation remains feasible because there exist no odd-numbered data or even-numbered data contiguous to each other in the row.

Inventors

  • 👤 Roger Lagadec
  • 👤 Keisuke Sekiguchi
  • 👤 Hiroyuki Yamauchi
  • 👤 Masaru Tezuka
  • 👤 Satoru Tobita
  • 👤 Yoichiro Sako
  • 👤 Hiroyuki Hara, deceased

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:10
CPC Classifications
H; H03; H03M; H03M13/00; H03M13/27; H03M13/276; H03M13/2764; G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 199 words
An apparatus for transmitting digital data samples along with error correction codes comprising: dividing means for receiving a sequence of said digital data samples and dividing a predetermined number of said digital data samples of said sequence into odd-numbered data samples and even-numbered data samples, arraying means for arraying the odd-numbered and even-numbered data samples as elements of an array, said array having elements arranged in rows and columns and in which no two adjacent digital data samples of said sequence are arrayed as respective elements in the same row, error correction code generating means responsive to a row of said array for generating first parity codes, said error correction code generating means being also responsive to a column of said array for generating second parity codes, said arraying means also arraying said first parity codes as additional elements in additional columns of said array, and said second parity codes as additional elements in additional rows of said array, thereby forming a full matrix, and output means for supplying said elements of said full matrix to an output terminal in an order according to the respective columns and rows of said full matrix in which said elements are arrayed.
Claim 2
Independent Claim 199 words
An apparatus for transmitting digital data samples along with error correction codes comprising: dividing means for receiving a sequence of said digital data samples and dividing a predetermined number of said digital data samples of said sequence into odd-numbered data samples and even-numbered data samples, arraying means for arraying the odd-numbered and even-numbered data samples as elements of an array, said array having elements arranged in rows and columns and in which no two adjacent digital data samples of said sequence are arrayed as respective elements in the same row, error correction code generating means responsive to a row of said array for generating first parity codes, said error correction code generating means being also responsive to a column of said array for generating second parity codes, said arraying means also arraying said first parity codes as additional elements in additional columns of said array, and said second parity codes as additional elements in additional rows of said array, thereby forming a full matrix, and output means for supplying said elements of said full matrix to an output terminal in an order according to the respective columns and rows of said full matrix in which said elements are arrayed.
Claim 3
Dependent Claim 38 words
An apparatus for transmitting digital data samples according to claim 1; wherein said arraying means arrays said even-numbered data samples as adjacent elements in said array, and said odd-numbered data samples as other adjacent elements in said array.
Claim 4
Dependent Claim 82 words
An apparatus for transmitting digital data according to claim 2, in which said arraying means arrays said even-numbered data samples, said odd-numbered data samples and said first parity codes so that said even-numbered samples comprise a first group of adjacent columns, said odd-numbered samples comprise a second group of adjacent columns and said first parity codes comprise a third group of adjacent columns, said third group of adjacent columns being adjacent and between said first and second groups in said full matrix.
Claim 5
Dependent Claim 263 words
A sampled data transmitting apparatus in which data samples making up a sequence of data samples to be transmitted are arranged as respective elements in a two-dimensional data array having rows and columns, and in which error correction code data are annexed to each row and to each column of said two-dimensional data array, said apparatus comprising: an interleaving memory having addressed locations for storing said data samples and said error correction code data at respective addressed locations in accordance with respective storage addresses and for reading out said data samples and said error correction code data from said respective addressed locations in accordance with respective read addresses, interleaving address generating means for generating and supplying storage addresses to said interleaving memory so that no two adjacent data samples of said sequence are stored in respective addressed locations corresponding to the same row of said two-dimensional data array, error correction code computing means for computing error correction code data for the rows and columns of said two-dimensional data array stored in said interleaving memory, and for supplying said error correction code data to said interleaving memory for storage therein, said interleaving address generating means also generating and supplying storage addresses for said error correction code data to said interleaving memory, and output address generating means for generating and supplying read addresses to said interleaving memory so that the data samples and the error correction code data are read out from the respective addressed locations corresponding to said read addresses in an order according to the columns and rows of said two-dimensional data array.
Claim 6
Dependent Claim 263 words
A sampled data transmitting apparatus in which data samples making up a sequence of data samples to be transmitted are arranged as respective elements in a two-dimensional data array having rows and columns, and in which error correction code data are annexed to each row and to each column of said two-dimensional data array, said apparatus comprising: an interleaving memory having addressed locations for storing said data samples and said error correction code data at respective addressed locations in accordance with respective storage addresses and for reading out said data samples and said error correction code data from said respective addressed locations in accordance with respective read addresses, interleaving address generating means for generating and supplying storage addresses to said interleaving memory so that no two adjacent data samples of said sequence are stored in respective addressed locations corresponding to the same row of said two-dimensional data array, error correction code computing means for computing error correction code data for the rows and columns of said two-dimensional data array stored in said interleaving memory, and for supplying said error correction code data to said interleaving memory for storage therein, said interleaving address generating means also generating and supplying storage addresses for said error correction code data to said interleaving memory, and output address generating means for generating and supplying read addresses to said interleaving memory so that the data samples and the error correction code data are read out from the respective addressed locations corresponding to said read addresses in an order according to the columns and rows of said two-dimensional data array.
Claim 7
Dependent Claim 79 words
An apparatus according to claim 4; further including dividing means for dividing said data samples into odd-numbered data samples and even-numbered data samples, and wherein said interleaving address generating means generates storage addresses so that said even-numbered data samples are stored in addressed locations corresponding to a first group of adjacent columns of said two-dimensional data array and said odd-numbered data samples are stored in addressed locations corresponding to a second group of adjacent columns of said two-dimensional array.
Claim 8
Independent Claim 218 words
An apparatus for transmitting digital data samples along with error correction codes comprising: dividing means for receiving a sequence of said digital data samples and dividing subsequences comprising a predetermined number of at least four of said digital data samples of said sequence into odd-numbered data samples and even-numbered data samples, arraying means for arraying the odd-numbered and even-numbered data samples as elements of an array, said array having elements arranged in rows and columns and in which all even-numbered elements of a subsequence are arrayed as respective elements in the same row, and all odd-numbered elements of said subsequence are arrayed as respective elements in a different row, error correction code generating means respective to a row of said array for generating first parity codes, said error correction code generating means being also responsive to a column of said array for generating second parity codes, said arraying means also arraying said first parity codes as additional elements in additional columns of said array, and said second parity codes as additional elements in additional rows of said array, thereby forming a full matrix, and output means for supplying said elements of said full matrix to an output terminal in an order according to the respective columns and rows of said full matrix in which said elements are arrayed.
Claim 9
Independent Claim 218 words
An apparatus for transmitting digital data samples along with error correction codes comprising: dividing means for receiving a sequence of said digital data samples and dividing subsequences comprising a predetermined number of at least four of said digital data samples of said sequence into odd-numbered data samples and even-numbered data samples, arraying means for arraying the odd-numbered and even-numbered data samples as elements of an array, said array having elements arranged in rows and columns and in which all even-numbered elements of a subsequence are arrayed as respective elements in the same row, and all odd-numbered elements of said subsequence are arrayed as respective elements in a different row, error correction code generating means respective to a row of said array for generating first parity codes, said error correction code generating means being also responsive to a column of said array for generating second parity codes, said arraying means also arraying said first parity codes as additional elements in additional columns of said array, and said second parity codes as additional elements in additional rows of said array, thereby forming a full matrix, and output means for supplying said elements of said full matrix to an output terminal in an order according to the respective columns and rows of said full matrix in which said elements are arrayed.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-10-25 1997-04-26 1997-10-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-10-25 2001-04-26 2001-10-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-10-25 2005-04-26 2005-10-26 $7700.00 Window Closed / Lapsed

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