US5253350A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of combining lower order and translated upper order bits to address ROM within a range reserved for other devices
Assignee: NEC Corp
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Filing: 1990-07-19
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Granted: 1993-10-12
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Expires: 2010-07-19
Abstract
Abstract In response to an address decoded in a preselected range, a multiplexer combines translated high order address bits with CPU-generated low order address bits to access random access memory, especially reserved range random access memory. Otherwise, the multiplexer merely combines CPU-generated low order bits with CPU-generated high order address bits to access RAM. An expanded memory specification memory map drives the translator to generate the translated high order address bits. This generates the address for reserved range RAM. RAM contents, normal and reserved range, are available for processing by the CPU.
Inventors
- 👤 Mark J. Foster
- 👤 Babu Rajaram
- 👤 Anthony M. Olson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 19:54
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/06; G06F12/0615; G06F12/0623
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
150 words
A method of accessing random access memory physically located within a range of addresses reserved for other devices, said method comprising the steps of: generating an address within a predetermined address window, said address having upper order information and lower order information; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said range reserved for other devices; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address; and addressing said random access memory with said combination address.
Claim 2
Independent Claim
150 words
A method of accessing random access memory physically located within a range of addresses reserved for other devices, said method comprising the steps of: generating an address within a predetermined address window, said address having upper order information and lower order information; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said range reserved for other devices; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address; and addressing said random access memory with said combination address.
Claim 3
Independent Claim
181 words
A method of accessing random access memory comprising the steps of: detecting whether an address in a computer system is within a predetermined address window, said address having upper order information and lower order information, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 4
Independent Claim
181 words
A method of accessing random access memory comprising the steps of: detecting whether an address in a computer system is within a predetermined address window, said address having upper order information and lower order information, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 5
Dependent Claim
16 words
The method of claim 2 wherein said selected offset value is a multiple of 64 kilobytes.
Claim 6
Independent Claim
182 words
A method of accessing random access memory comprising the steps of: generating an address, said address having upper order information and lower order information; detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by an offset value of 128 kilobytes, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 7
Independent Claim
182 words
A method of accessing random access memory comprising the steps of: generating an address, said address having upper order information and lower order information; detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by an offset value of 128 kilobytes, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 8
Independent Claim
228 words
A method of accessing random access memory comprising the steps of: generating an address, said address having upper order information and lower order information; detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by inverting the most significant bit of said mapping information to create the most significant bit of said translated mapping information, exclusive NORing the second and third most significant bits of said mapping information to create the second most significant bit of said translated mapping information and using the third, fourth, fifth and sixth most significant bits of said mapping information as the third, fourth, fifth and sixth most significant bits of said translated mapping information respectively, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 9
Independent Claim
228 words
A method of accessing random access memory comprising the steps of: generating an address, said address having upper order information and lower order information; detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range; translating said mapping information by inverting the most significant bit of said mapping information to create the most significant bit of said translated mapping information, exclusive NORing the second and third most significant bits of said mapping information to create the second most significant bit of said translated mapping information and using the third, fourth, fifth and sixth most significant bits of said mapping information as the third, fourth, fifth and sixth most significant bits of said translated mapping information respectively, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said combining being responsive to said detecting; and addressing said random access memory with said combination address.
Claim 10
Independent Claim
179 words
An apparatus in a computer system for accessing random access memory physically located within a range of addresses reserved for other devices, said apparatus comprising: means for generating an address within a predetermined address window, said address having upper order information and lower order information; means for retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said range reserved for other devices; means coupled to said means for retrieving, for translating said mapping information, said means for translating comprising means for converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; means, coupled to said means for translating, for combining said translated mapping information with said lower order information to form a combination address; and means for addressing said random access memory with said combination address.
Claim 11
Independent Claim
179 words
An apparatus in a computer system for accessing random access memory physically located within a range of addresses reserved for other devices, said apparatus comprising: means for generating an address within a predetermined address window, said address having upper order information and lower order information; means for retrieving mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said range reserved for other devices; means coupled to said means for retrieving, for translating said mapping information, said means for translating comprising means for converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; means, coupled to said means for translating, for combining said translated mapping information with said lower order information to form a combination address; and means for addressing said random access memory with said combination address.
Claim 12
Independent Claim
225 words
An apparatus in a computer system for accessing random access memory comprising: means for generating an address, said address having upper order information and lower order information; means, coupled to said means for generating, for decoding said upper order information of said address and for detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; means for translating mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range, said means for translating comprising means for converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, and said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; means, coupled to said means for translating and said means for decoding, for combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said means for combining being responsive to said means for decoding; and means for addressing said random access memory with said combination address.
Claim 13
Independent Claim
225 words
An apparatus in a computer system for accessing random access memory comprising: means for generating an address, said address having upper order information and lower order information; means, coupled to said means for generating, for decoding said upper order information of said address and for detecting whether said address is within a predetermined address window, said address within said window indicating an access to random access memory physically located within a range of addresses reserved for other devices; means for translating mapping information previously stored in a mapping memory, said mapping information corresponding to available random access memory within said reserved range, said means for translating comprising means for converting the binary bits of said mapping information to a form in accordance with inverting said bits and then offsetting said inverted bits by a selected offset value, and said translated mapping information comprising replacement upper order address information for addressing the physical location of said available random access memory within said reserved range; means, coupled to said means for translating and said means for decoding, for combining said translated mapping information with said lower order information to form a combination address when said upper order information is within said predetermined address window, said means for combining being responsive to said means for decoding; and means for addressing said random access memory with said combination address.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-10-11 | 1997-04-12 | 1997-10-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-10-11 | 2001-04-12 | 2001-10-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-10-11 | 2005-04-12 | 2005-10-12 | $7700.00 | Window Closed / Lapsed |