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US5247682A Expired / Lapsed US ⏱️ 0.0 years remaining

System and method for the automatic setting of a computer system's I/O configuration

Assignee: Seiko Epson Corp
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Filing: 1991-03-08
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Granted: 1993-09-21
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Expires: 2011-03-08
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Abstract

Abstract A method of configuring a computer system having internal and external Serial Input/Output (SIO) ports, includes determining the designation of each SIO port present in the system as being either primary, secondary, or disabled. The designations of the physically present SIO ports are used to update the contents of a non-volatile memory. Prior to updating the non-volatile memory, a read operation is performed on the non-volatile memory. If the non-volatile memory presently reflects the status of the physically present SIO ports, the updating of the non-volatile memory is bypassed.

Inventors

  • 👤 Yoshimasa Kondou
  • 👤 Masaaki Hanaoka
  • 👤 Shinji Nakamura
  • 👤 Fumiaki Doi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 20:44
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/4401; G06F9/4411

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 381 words
A process of configuring a computer system having an internal Serial Input/Output (SIO) port, at least one external SIO port, said SIO ports having internal control registers wherein said control registers store information indicative of the designation of the corresponding SIO port as primary, secondary, or disabled, and a non-volatile memory for storing a user's designation of each SIO port as either primary, secondary, or disabled, comprising the steps of: a) disabling said internal SIO port; b) determining whether any of said at least one external SIO port has been designated as primary in its corresponding control register; c) setting said internal SIO port control register designation to be primary, if the determination of step (b) is negative; d) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as primary, said process being complete if the determination of step (d) is affirmative; e) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as primary if the determination of step (d) is negative, said process being complete after the setting of step (e); f) determining whether any of said at least one external SIO port has been designated as secondary in its corresponding control register if the determination of step (b) is affirmative; g) setting said internal SIO port control register designation to be secondary, if the determination of step (f) is negative; h) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as secondary, said process being complete if the determination of step (h) is affirmative; i) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as secondary if the determination of step (h) is negative, said process being complete after the setting of step (i); j) disabling said internal SIO port if the determination of step (f) is affirmative; k) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as disabled, said process being complete if the determination of step (k) is affirmative; and l) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as disabled if the determination of step (k) is negative, said process being complete after the setting of step (l).
Claim 2
Dependent Claim 381 words
A process of configuring a computer system having an internal Serial Input/Output (SIO) port, at least one external SIO port, said SIO ports having internal control registers wherein said control registers store information indicative of the designation of the corresponding SIO port as primary, secondary, or disabled, and a non-volatile memory for storing a user's designation of each SIO port as either primary, secondary, or disabled, comprising the steps of: a) disabling said internal SIO port; b) determining whether any of said at least one external SIO port has been designated as primary in its corresponding control register; c) setting said internal SIO port control register designation to be primary, if the determination of step (b) is negative; d) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as primary, said process being complete if the determination of step (d) is affirmative; e) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as primary if the determination of step (d) is negative, said process being complete after the setting of step (e); f) determining whether any of said at least one external SIO port has been designated as secondary in its corresponding control register if the determination of step (b) is affirmative; g) setting said internal SIO port control register designation to be secondary, if the determination of step (f) is negative; h) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as secondary, said process being complete if the determination of step (h) is affirmative; i) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as secondary if the determination of step (h) is negative, said process being complete after the setting of step (i); j) disabling said internal SIO port if the determination of step (f) is affirmative; k) determining if said non-volatile memory contains information indicative of said internal SIO port being designated as disabled, said process being complete if the determination of step (k) is affirmative; and l) setting said non-volatile memory to contain information indicative of said internal SIO port being designated as disabled if the determination of step (k) is negative, said process being complete after the setting of step (l).
Claim 3
Dependent Claim 13 words
The method of claim 1 wherein said non-volatile memory comprises a CMOS RAM.

References Cited (Backward Citations)

US4300193A Cited
US4562535A Cited
US5014193A Cited
US5068780A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-09-20 1997-03-22 1997-09-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-09-20 2001-03-22 2001-09-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-09-20 2005-03-22 2005-09-21 $7700.00 Window Closed / Lapsed

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