Patent DE671135C successfully refreshed from Google Patents.
US5247458A
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US
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Method and apparatus for testing a digital system for the occurrence of errors
Assignee: HP HOLDINGS THREE Inc
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Filing: 1990-09-11
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Granted: 1993-09-21
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Expires: 2010-09-11
Abstract
Abstract A method and apparatus for testing a digital signal processing system for the occurrence of bit errors. A mathematically-predictable test signal is applied to the input of a digital signal processing system The test signal components are removed from the output signal of the system by filtering, curve fitting or other techniques, leaving a resultant signal. The peak amplitude of the resultant signal is measured as an indication of the occurrence of errors. A time integrated measure of the resultant signal is made as an indication of the amount of noise and distortion artifacts. The peak amplitude is compared to a reference or the time integrated measure to identify errors. A histogram of the resultant signal amplitude may also be produced.
Inventors
- 👤 Richard C. Cabot
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 22:04
CPC Classifications
G; G06; G06F; G06F11/00; G01; G01R; G01R31/00; G01R31/28; G01R31/30
Claims Analysis
Total Claims: 31
Claim 1
Independent Claim
92 words
A method for testing a digital system for the occurrence of errors, said system having an input port for receiving an input signal and an output port for producing an output signal, comprising the steps of: (a) applying to said input port an input signal having known sinusoidal frequency components; (b) removing sinusoidal frequency components from said output signal of said system, thereby producing a resultant signal; and (c) thereafter identifying instances when the amplitude of said resultant signal exceeds a selected threshold, as an indication of the occurrence of an error.
Claim 2
Independent Claim
92 words
A method for testing a digital system for the occurrence of errors, said system having an input port for receiving an input signal and an output port for producing an output signal, comprising the steps of: (a) applying to said input port an input signal having known sinusoidal frequency components; (b) removing sinusoidal frequency components from said output signal of said system, thereby producing a resultant signal; and (c) thereafter identifying instances when the amplitude of said resultant signal exceeds a selected threshold, as an indication of the occurrence of an error.
Claim 3
Dependent Claim
26 words
The method of claim 1, further comprising the step of determining the number of occurrences of errors per unit time as a measure of error rate.
Claim 4
Dependent Claim
72 words
The method of claim 2, wherein said identifying step comprises measuring the peak amplitude of said resultant signal after removing sinusoidal frequency components from said output signal to identify the occurrence of an error, and said determining step comprises counting the number of such occurrence over a known period of time and computing the ratio of said number of such occurrences to said known period of time to determine said error rate.
Claim 5
Dependent Claim
17 words
The method of claim 1, further comprising the step of recording the time when an error occurs.
Claim 6
Dependent Claim
24 words
The method of claim 1, wherein said identifying step comprises recording the instantaneous amplitude of said resultant signal in the form of a histogram.
Claim 7
Dependent Claim
19 words
The method of claim 1, wherein said step of removing sinusoidal frequency components comprises selectively filtering said output signal.
Claim 8
Dependent Claim
14 words
The method of claim 6, wherein said filtering is accomplished using a digital filter.
Claim 9
Dependent Claim
38 words
The method of claim 1, wherein said step of removing sinusoidal frequency components comprises fitting a curve to said output signal, and subtracting said curve from said output signal to remove sinusoidal frequency components from said output signal.
Claim 10
Independent Claim
24 words
The method any of claims 1 through 8, wherein said input port accepts a digital signal and said known sinusoidal frequency components are digitized.
Claim 11
Independent Claim
28 words
The method of any of claims 1 through 8, wherein said output signal is digitized and said step of removing sinusoidal frequency components occurs in the digital domain.
Claim 12
Independent Claim
48 words
The method of any of claims 1 through 8, wherein said output signal is digitized, further comprising the step of converting said output signal to an analog signal, and said identifying step comprises measuring the peak amplitude of said analog signal to identify the occurrence of an error.
Claim 13
Dependent Claim
43 words
The method of claim 11, wherein said identifying step further comprises the step of taking a time integrated measure of the amplitude of said analog signal and comparing said peak amplitude to said time integrated measure to identify the occurrence of an error.
Claim 14
Independent Claim
33 words
The method of either of claims 1 or 2, wherein said identifying step comprises comparing the peak amplitude of said resultant signal to a fixed threshold to identify the occurrence of an error.
Claim 15
Independent Claim
38 words
The method of either of claims 1 or 2, wherein said identifying step comprises comparing the peak amplitude of said resultant signal to a time integrated measure of resultant signal amplitude to identify the occurrence of an error.
Claim 16
Independent Claim
97 words
An apparatus for testing a digital system for the occurrence of errors, said system having an input port for receiving an input signal and an output port for producing an output signal, comprising: (a) signal source means for applying to said input port an input signal having known sinusoidal frequency components; (b) subtractor means for removing sinusoidal frequency components from said output signal of said system, thereby producing a resultant signal; and (c) identifier means, responsive to said subtractor amplitude of said resultant signal exceeds a selected threshold, as an indication of the occurrence of an error.
Claim 17
Independent Claim
97 words
An apparatus for testing a digital system for the occurrence of errors, said system having an input port for receiving an input signal and an output port for producing an output signal, comprising: (a) signal source means for applying to said input port an input signal having known sinusoidal frequency components; (b) subtractor means for removing sinusoidal frequency components from said output signal of said system, thereby producing a resultant signal; and (c) identifier means, responsive to said subtractor amplitude of said resultant signal exceeds a selected threshold, as an indication of the occurrence of an error.
Claim 18
Dependent Claim
25 words
The apparatus of claim 15, further comprising means for determining the number of occurrence of errors per unit time as a measure of error rate.
Claim 19
Dependent Claim
74 words
The apparatus of claim 16, wherein said identifier means comprises means for measuring the peak amplitude of said output signal after removing sinusoidal frequency components to identify the occurrence of an error, and said determining means comprises means for counting the number of such occurrences over a known period of time and means for outputting the ratio of said number of such occurrences to said known period of time to determine said error rate.
Claim 20
Dependent Claim
16 words
The apparatus of claim 15, further comprising means for recording the time when an error occurs.
Claim 21
Dependent Claim
26 words
The apparatus of claim 15, wherein said identifier means comprises means for recording the instantaneous amplitude of said resultant signal in the form of a histogram.
Claim 22
Dependent Claim
25 words
The apparatus of claim 15, wherein said subtraction means comprises filter means for filtering said output signal so as to selectively remove sinusoidal frequency components.
Claim 23
Dependent Claim
13 words
The apparatus of claim 20, wherein said subtracter means comprises a digital filter.
Claim 24
Dependent Claim
39 words
The apparatus of claim 15, wherein said subtraction means comprises means for fitting a sinusoidal curve to said output signal, and means for subtracting said curve from said output signal to remove sinusoidal frequency components from said output signal.
Claim 25
Independent Claim
25 words
The apparatus of any of claims 15 through 22, wherein said input port accepts a digital signal and said known sinusoidal frequency components are digitized.
Claim 26
Independent Claim
23 words
The apparatus of any of claims 15 through 23, wherein said output signal is digitized and said subtracter means comprises a digital filter.
Claim 27
Independent Claim
43 words
The apparatus of any of claims 16 through 22, further comprising means for converting said output signal to an analog signal and said identifier means comprises means for measuring the peak amplitude of said analog signal to identify the occurrence of an error.
Claim 28
Dependent Claim
44 words
The apparatus of claim 25, wherein said identifier means further comprises means for taking a time integrated measure of the amplitude of said analog signal and means for comparing said peak amplitude to said time integrated measure to identify the occurrence of an error.
Claim 29
Independent Claim
35 words
The apparatus of either of claims 15 or 16, wherein said identifier means comprises means for comparing the peak amplitude of said resultant signal to a fixed threshold to identify the occurrence of an error.
Claim 30
Independent Claim
40 words
The apparatus of either of claims 15 or 16, wherein said identifier means comprises means for comparing the peak amplitude of said resultant signal to a time integrated measure of resultant signal amplitude to identify the occurrence of an error.
Claim 31
Dependent Claim
18 words
The apparatus of claim 15, wherein said subtracter means and said identifier means comprise a programmed digital computer.
References Cited (Backward Citations)
US4055801A
Cited
US3764995A
Cited
US3912880A
Cited
US3976940A
Cited
US4092589A
Cited
US4318128A
Cited
US4352182A
Cited
US4351062A
Cited
US4709395A
Cited
US4706290A
Cited
US4773094A
Cited
US4855930A
Cited
US5168216A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1996-09-20 | 1997-03-22 | 1997-09-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-09-20 | 2001-03-22 | 2001-09-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-09-20 | 2005-03-22 | 2005-09-21 | $7700.00 | Window Closed / Lapsed |