Method for online modification of compressed digital test vectors

Claim 2

In an automated circuit test system having random access memory (RAM) for storing digital test vectors complied from source code, each of said test vectors being comprised of a plurality of characters, said test vectors being in compressed format, a method for modifying, without recompilation of said source code, said test vectors in said RAM, in response to user input for modifying said test vector n, where n is a vector execution of sequence number, said method comprising the steps of: modifying said vector n; and inverting, in response to the condition wherein vector (n+1) contains at least one non-binary digit, the state of each said character in said vector (n+1) corresponding, on a character-per-character basis, to each said character in said vector n whose state was modified.

Claim 3

The method of claim 1, wherein said RAM contains indicia of location of said test vectors, further comprising: allocating a first new location in said RAM; storing, in said first new location, a copy of vector n; creating, in RAM, new said indicia of location of said copy of vector n; and modifying said copy of vector n.

Claim 4

The method of claim 2, further comprising: allocating a second new location in said RAM; storing, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a copy of vector (n+1) in said second new location; creating, in RAM, new said indicia of location of said copy of vector (n+1).

Claim 5

The method of claim 1, wherein said automated circuit test system includes a plurality of channels, each of said channels being connected to a driver and a receiver, said driver capable of applying a stimulus to a specific input on a circuit under test, and said receiver capable of monitoring a specific output from said circuit under test.

Claim 6

The method of claim 4, wherein each of said test vectors is representative of a set of parallel signals executed sequentially to test an electronic circuit, each character in a said vector corresponding to a specific one of said channels in said test system, and said parallel signals being sent/received via said plurality of channels.

Claim 7

The method of claim 1, wherein said compressed format is effected by indirect compression and keep/toggle compression of said vectors, said indirect compression employing a plurality of associated lists of pointers to reference said vectors, said keep/toggle compression deriving each said character in a given said vector from the state of the corresponding vector character in the preceeding vector.

Claim 8

In an automated circuit test system having random access memory (RAM) for storing digital test vectors complied from source code, said vectors being in compressed format, each of said test vectors being comprised of a plurality of characters, said RAM being capable of storing a plurality of commands for executing said vectors, said RAM having indicia of location of said test vectors, a method for modifying, in response to user input, without re-compilation of said source code, a said test vector n in said RAM, where n is a vector execution sequence number, said method comprising the steps of: creating a new vector n' by storing a copy of vector n in said RAM; modifying vector n'; creating, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a new vector (n+1)' by storing a copy of vector (n+1) in a second new vector location; inverting the state of each character in vector (n+1)' corresponding, on a character-per-character basis, to each character in vector n' whose state was modified; creating new entries in said RAM by: creating a first new entry, in said RAM, having indicia of location corresponding to vector n'; and creating a second new entry, in said RAM, having indicia of location corresponding to vector (n+1)'; and creating new compounds, in said RAM, each said new command having indicia of location corresponding to a different one of said new entries.

Claim 9

In an automated circuit test system having random access memory (RAM) for storing digital test vectors complied from source code, said vectors being in compressed format, each of said test vectors being comprised of a plurality of characters, said RAM being capable of storing a plurality of commands for executing said vectors, said RAM having indicia of location of said test vectors, a method for modifying, in response to user input, without re-compilation of said source code, a said test vector n in said RAM, where n is a vector execution sequence number, said method comprising the steps of: creating a new vector n' by storing a copy of vector n in said RAM; modifying vector n'; creating, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a new vector (n+1)' by storing a copy of vector (n+1) in a second new vector location; inverting the state of each character in vector (n+1)' corresponding, on a character-per-character basis, to each character in vector n' whose state was modified; creating new entries in said RAM by: creating a first new entry, in said RAM, having indicia of location corresponding to vector n'; and creating a second new entry, in said RAM, having indicia of location corresponding to vector (n+1)'; and creating new compounds, in said RAM, each said new command having indicia of location corresponding to a different one of said new entries.

Claim 10

The method of claim 7, wherein said test vectors are represented in object code compiled from said source code, said vectors being in a compressed format, said compressed format being effected by indirect compression and keep/toggle compression of said vectors, said indirect compression employing a plurality of correlated lists of pointers to reference said vectors, said keep/toggle compression deriving each said character in a given said vector from the state of the corresponding vector character in the preceeding vector.

Claim 11

The method of claim 7, wherein the step of creating new commands in said RAM further comprises: (1) locating the command in said program RAM having vector n as a target; (2) splitting, in response to the condition wherein said command having vector n as a target is a command for executing N vectors, said command into at least two said commands, at least one of said commands being a said command for executing a single vector; and (3) repeating steps (1) and (2) in response to the condition wherein vector (n+1)' was created, substituting "(n+1)" for "n".

Claim 12

The method of claim 9, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is the first target vector in a said command for executing N vectors, said command into a said command for executing a single vector and a command for executing (N-1) vectors; creating a new entry, in said sequence RAM, having indicia of location of vector n'; and setting, in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.

Claim 13

The method of claim 9, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is neither the first, nor the last, target vector in said command for executing N vectors, said command into a leading said command for executing N' vectors, a said command for executing a single vector n', and a trailing said command for executing N" vectors, where N' is the number of said target vectors in said command for executing N vectors preceding said target vector n, and N" is the number of said target vectors in said command for executing N vectors following said target vector n; creating an entry, in said sequence RAM, having indicia of location of vector n'; and setting, in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.

Claim 14

The method of claim 9, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is the last target vector in said command for executing N vectors, said command into a leading said command for executing (N-1) vectors and a trailing said command for executing single vector; and creating a new entry, in said sequence RAM, having indicia of location of vector n'; and setting in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.

Claim 15

In an automated circuit test system having random access memory for storing digital test vectors, each of said test vectors being comprised of a plurality of characters, said random-access memory containing indicia of location of said digital test vectors, said test vectors being represented in object code compiled from source code, said test vectors having a compressed format, said compressed format including indirect compression and keep/toggle compression, a method for modifying, in response to user input, without re-compilation of said source code, a said test vector n in said random-access memory, wherein n is a vector execution sequence number, said method comprising the steps of: allocating a first new location in said RAM; storing, in said first new location, a copy of vector n; creating, in RAM new said indicia of location of said copy of vector n; modifying said copy of vector n; storing, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a copy of vector (n+1) in a second new location; inverting the state of each said character in said copy of vector (n+1) corresponding, on a character-per-character basis, to each character in said copy of vector n whose state was modified; and creating, in RAM, new said indicia of location of said copy of vector (n+1).

Claim 16

In an automated circuit test system having random access memory for storing digital test vectors, each of said test vectors being comprised of a plurality of characters, said random-access memory containing indicia of location of said digital test vectors, said test vectors being represented in object code compiled from source code, said test vectors having a compressed format, said compressed format including indirect compression and keep/toggle compression, a method for modifying, in response to user input, without re-compilation of said source code, a said test vector n in said random-access memory, wherein n is a vector execution sequence number, said method comprising the steps of: allocating a first new location in said RAM; storing, in said first new location, a copy of vector n; creating, in RAM new said indicia of location of said copy of vector n; modifying said copy of vector n; storing, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a copy of vector (n+1) in a second new location; inverting the state of each said character in said copy of vector (n+1) corresponding, on a character-per-character basis, to each character in said copy of vector n whose state was modified; and creating, in RAM, new said indicia of location of said copy of vector (n+1).

Claim 17

In an automated circuit test system having vector random access memory (vector RAM) for storing a set of digital test vectors, program RAM for storing test commands, and sequence RAM for storing addresses of said vectors, said circuit test system having an set of commands in said program RAM comprising a command for executing a single vector, and a command for executing N vectors, each of said commands having indicia of location of an entry in said sequence RAM containing the address of a target one of said test vectors, said test system having a plurality of channels, each said channel capable of sending and receiving a signal to a circuit under test, each of said test vectors having a plurality of characters, each character in a said vector corresponding to a specific one of said channels in said test system, said vectors being represented in object code compiled from source code, said test vectors having a compressed format, said compressed format including indirect compression and keep/toggle compression, a method for modifying, in response to user input, without re-compilation of said source code, a digital test vector n in said random-access memory, where n is a vector sequence number, said method comprising the steps of: creating a new vector n by storing a copy of vector n in said vector RAM; modifying vector n'; creating, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a new vector (n+1)' by storing a copy of vector (n+1) in a second new vector location; inverting the state of each character in vector (n+1)' corresponding, on a character-per-character basis, to each character in vector n' whose state was modified; creating new entries in said sequence RAM by: creating a first new entry having indicia of location corresponding to vector n'; and creating a second new entry having indicia of location corresponding to vector (n+1)'; and creating two new commands, in said program RAM, each said new command having indicia of location corresponding to a different one of said new entries in said sequence RAM.

Claim 18

In an automated circuit test system having vector random access memory (vector RAM) for storing a set of digital test vectors, program RAM for storing test commands, and sequence RAM for storing addresses of said vectors, said circuit test system having an set of commands in said program RAM comprising a command for executing a single vector, and a command for executing N vectors, each of said commands having indicia of location of an entry in said sequence RAM containing the address of a target one of said test vectors, said test system having a plurality of channels, each said channel capable of sending and receiving a signal to a circuit under test, each of said test vectors having a plurality of characters, each character in a said vector corresponding to a specific one of said channels in said test system, said vectors being represented in object code compiled from source code, said test vectors having a compressed format, said compressed format including indirect compression and keep/toggle compression, a method for modifying, in response to user input, without re-compilation of said source code, a digital test vector n in said random-access memory, where n is a vector sequence number, said method comprising the steps of: creating a new vector n by storing a copy of vector n in said vector RAM; modifying vector n'; creating, in response to the condition wherein vector (n+1) contains at least one non-binary digit, a new vector (n+1)' by storing a copy of vector (n+1) in a second new vector location; inverting the state of each character in vector (n+1)' corresponding, on a character-per-character basis, to each character in vector n' whose state was modified; creating new entries in said sequence RAM by: creating a first new entry having indicia of location corresponding to vector n'; and creating a second new entry having indicia of location corresponding to vector (n+1)'; and creating two new commands, in said program RAM, each said new command having indicia of location corresponding to a different one of said new entries in said sequence RAM.

Claim 19

The method of claim 14, wherein the step of creating new entries in said program RAM and said sequence RAM further comprises: (1) locating the command in said program RAM having vector n as a target; (2) splitting, in response to the condition wherein said command having vector n as a target is a command for executing N vectors, said command into at least two said commands, at least one of said commands being a said command for executing a single vector; and (3) repeating steps (1) and (2) in response to the condition wherein vector (n+1)' was created, substituting "(n+1)" for "n".

Claim 20

The method of claim 14, wherein the step of creating a new command in said program RAM includes: modifying, in response to the condition wherein said command having vector n as a target is a said command for executing a single vector, said indicia of location in said command to indicate the location of said new entry in said sequence RAM.

Claim 21

The method of claim 15, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is the first target vector in a said command for executing N vectors, said command into a said command for executing a single vector and a command for executing (N-1) vectors; creating a new entry, in said sequence RAM, having indicia of location of vector n'; and setting, in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.

Claim 22

The method of claim 13, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is neither the first, nor the last, target vector in said command for executing N vectors, said command into a leading said command for executing N' vectors, a new said command for executing a single vector, and a trailing said command for executing N" vectors, where N' is the number of said target vectors in said command for executing N vectors preceding said target vector n, and N" is the number of said target vectors following said target vector n; creating an entry, in said sequence RAM, having indicia of location of vector n'; and setting, in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.

Claim 23

The method of claim 13, wherein the step of command splitting further comprises: splitting, in response to the condition wherein said modified vector n' is the last target vector in said command for executing N vectors, said command into a leading said command for executing (N-1) vectors and a trailing said command for executing a single vector, and creating a new entry, in said sequence RAM, having indicia of location of vector n'; and setting, in said command for executing said vector n', indicia of location pointing to said new entry in said sequence RAM.