Semiconductor wafer processing method of forming channel stops and method of forming SRAM circuitry

Claim 1

A semiconductor device isolation method of forming a channel stop in a semiconductor wafer, the method comprising the following steps: selectively forming field oxide on a semiconductor wafer surface, the field oxide having a bird's beak region and a non-bird's beak region, the bird's beak region laterally extending into a desired region on the wafer; masking the bird's beak region and desired region; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak region of the field oxide to define a channel stop implant in the wafer under the non-bird's beak region of the field oxide, such non-bird's beak region implant being conducted at an implant angle along the bird's beak which is less than about 10° from perpendicular relative to the wafer surface; and with the masking in place, ion implanting a selected material into the wafer through the bird's beak region of the field oxide to define a channel stop implant in the wafer under and along the bird's beak region of the field oxide, such bird's beak region implant being conducted at an implant angle along the bird's beak region which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface.

Claim 7

A method of forming a transistor in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface, selectively forming field oxide on the semiconductor wafer to define a desired region for formation of active area and a gate, the field oxide having opposing bird's beak regions and non-bird's beak regions, the bird's beak regions laterally and opposingly extending into the desired region; providing a transistor gate; masking the opposing bird's beak regions and the desired region; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the one bird's beak region of the field oxide, such one bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the other bird's beak region of the field oxide, such other bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; and providing active area in the desired region adjacent the gate.

Claim 8

A method of forming a transistor in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface, selectively forming field oxide on the semiconductor wafer to define a desired region for formation of active area and a gate, the field oxide having opposing bird's beak regions and non-bird's beak regions, the bird's beak regions laterally and opposingly extending into the desired region; providing a transistor gate; masking the opposing bird's beak regions and the desired region; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the one bird's beak region of the field oxide, such one bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the other bird's beak region of the field oxide, such other bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; and providing active area in the desired region adjacent the gate.

Claim 13

A method of forming an access transistor of an SRAM in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a desired region for formation of active area and a gate, the field oxide having opposing bird's beak regions and non-bird's beak regions, the bird's beak regions laterally and opposingly extending into the desired region; providing a transistor gate; masking the opposing bird's beak regions and the desired region; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the one bird's beak region of the field oxide, such one bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the other bird's beak region of the field oxide, such other bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; and providing active area in the desired region adjacent the gate.

Claim 14

A method of forming an access transistor of an SRAM in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a desired region for formation of active area and a gate, the field oxide having opposing bird's beak regions and non-bird's beak regions, the bird's beak regions laterally and opposingly extending into the desired region; providing a transistor gate; masking the opposing bird's beak regions and the desired region; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the one bird's beak region of the field oxide, such one bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide to define a channel stop implant in the wafer under and along the other bird's beak region of the field oxide, such other bird's beak region implant being conducted at an implant angle along the bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface; and providing active area in the desired region adjacent the gate.

Claim 19

A method of forming an access transistor and a pull down transistor of an SRAM in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a pair of desired access transistor regions for formation of access transistor active areas and access transistor gates, and to define a pair of desired pull down transistor regions for formation of pull down transistor active areas and pull down transistor gates; the access transistor regions and pull down transistor regions having respective lengths and widths, the respective access and pull down transistor region lengths being longer than their respective widths, the access transistor regions and the pull down transistor regions being substantially parallel oriented relative to one another, the width of the access transistor regions being less than the width of the pull down transistor regions, the access transistors being farther from one another than are the pull down transistors from one another; the field oxide for each of the access transistor regions and pull down transistor regions having opposing bird's beak regions and non-bird's beak regions, the respective access transistor and pull down transistor bird's beak regions laterally and opposingly extending into the respective desired regions; providing a gate for each of the access transistor and pull down transistor; masking the opposing bird's beak regions and the desired regions; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define access transistor and pull down transistor channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a first angled access transistor channel stop implant in the wafer under and along the one access transistor bird's beak region, such one access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the closeness of the pair of pull down devices to one another as compared to that of the access devices effectively masking from implanting beneath bird's beak regions of the pull down devices during such first angled implant; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a second angled access transistor channel stop implant in the wafer under and along the other access transistor bird's beak region, such other access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the closeness of the pair of pull down devices to one another as compared to that of the access devices effectively masking from implanting beneath bird's beak regions of the pull down devices during such second angled implant; and providing active area in the desired regions adjacent the gates.

Claim 20

A method of forming an access transistor and a pull down transistor of an SRAM in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a pair of desired access transistor regions for formation of access transistor active areas and access transistor gates, and to define a pair of desired pull down transistor regions for formation of pull down transistor active areas and pull down transistor gates; the access transistor regions and pull down transistor regions having respective lengths and widths, the respective access and pull down transistor region lengths being longer than their respective widths, the access transistor regions and the pull down transistor regions being substantially parallel oriented relative to one another, the width of the access transistor regions being less than the width of the pull down transistor regions, the access transistors being farther from one another than are the pull down transistors from one another; the field oxide for each of the access transistor regions and pull down transistor regions having opposing bird's beak regions and non-bird's beak regions, the respective access transistor and pull down transistor bird's beak regions laterally and opposingly extending into the respective desired regions; providing a gate for each of the access transistor and pull down transistor; masking the opposing bird's beak regions and the desired regions; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define access transistor and pull down transistor channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a first angled access transistor channel stop implant in the wafer under and along the one access transistor bird's beak region, such one access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the closeness of the pair of pull down devices to one another as compared to that of the access devices effectively masking from implanting beneath bird's beak regions of the pull down devices during such first angled implant; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a second angled access transistor channel stop implant in the wafer under and along the other access transistor bird's beak region, such other access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the closeness of the pair of pull down devices to one another as compared to that of the access devices effectively masking from implanting beneath bird's beak regions of the pull down devices during such second angled implant; and providing active area in the desired regions adjacent the gates.

Claim 25

A method of forming an access transistor and a pull down transistor of an SRAM device in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a pair of desired access transistor regions for formation of access transistor active areas and access transistor gates, and to define a pair of desired pull down transistor regions for formation of pull down transistor active areas and pull down transistor gates; the access transistor regions and pull down transistor regions having respective lengths and widths, the respective access and pull down transistor region lengths being longer than their respective widths, the access transistor regions and the pull down transistor regions being oriented relative to one another at approximately 90°; the field oxide for each of the access transistor regions and pull down transistor regions having opposing bird's beak regions and non-bird's beak regions, the respective access transistor and pull down transistor bird's beak regions laterally and opposingly extending into the respective desired regions; providing a gate for each of the access transistor and pull down transistor; masking the opposing bird's beak regions and the desired regions; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define access transistor and pull down transistor channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a first angled access transistor channel stop implant in the wafer under and along the one access transistor bird's beak region, such one access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the approximately 90° angling of the access and pull down transistor regions relative to one another effectively masking from implanting beneath bird's beak regions of the pull down devices during such first angled implant; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a second angled access transistor channel stop implant in the wafer under and along the other access transistor bird's beak region, such other access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the approximately 90° angling of the access and pull down transistor regions relative to one another effectively masking from implanting beneath bird's beak regions of the pull down devices during such second angled implant; and providing active area in the desired regions adjacent the gates.

Claim 26

A method of forming an access transistor and a pull down transistor of an SRAM device in a semiconductor wafer, the method comprising the following steps: forming a gate insulator on a semiconductor wafer surface; selectively forming field oxide on the semiconductor wafer to define a pair of desired access transistor regions for formation of access transistor active areas and access transistor gates, and to define a pair of desired pull down transistor regions for formation of pull down transistor active areas and pull down transistor gates; the access transistor regions and pull down transistor regions having respective lengths and widths, the respective access and pull down transistor region lengths being longer than their respective widths, the access transistor regions and the pull down transistor regions being oriented relative to one another at approximately 90°; the field oxide for each of the access transistor regions and pull down transistor regions having opposing bird's beak regions and non-bird's beak regions, the respective access transistor and pull down transistor bird's beak regions laterally and opposingly extending into the respective desired regions; providing a gate for each of the access transistor and pull down transistor; masking the opposing bird's beak regions and the desired regions; with the masking in place, ion implanting a selected material into the wafer through the non-bird's beak regions of the field oxide to define access transistor and pull down transistor channel stop implants in the wafer under the non-bird's beak regions of the field oxide, such non-bird's beak regions implant being conducted at an implant angle along the bird's beak regions which is less than about 10° from perpendicular relative to the wafer surface; with the masking in place, ion implanting a selected material into the wafer through one of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a first angled access transistor channel stop implant in the wafer under and along the one access transistor bird's beak region, such one access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the approximately 90° angling of the access and pull down transistor regions relative to one another effectively masking from implanting beneath bird's beak regions of the pull down devices during such first angled implant; with the masking in place, ion implanting a selected material into the wafer through the other of the opposing bird's beak regions of the field oxide adjacent the access transistor region to define a second angled access transistor channel stop implant in the wafer under and along the other access transistor bird's beak region, such other access transistor bird's beak region implant being conducted at an implant angle along the access transistor bird's beak regions which is greater than about 10° and less than about 40° from perpendicular relative to the wafer surface, the approximately 90° angling of the access and pull down transistor regions relative to one another effectively masking from implanting beneath bird's beak regions of the pull down devices during such second angled implant; and providing active area in the desired regions adjacent the gates.