US5239209A
Expired / Lapsed
US
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Zero crossing detection circuit
Assignee: 3M Co
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Filing: 1991-06-17
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Granted: 1993-08-24
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Expires: 2011-06-17
Abstract
Abstract A zero crossing detection circuit produces an output signal which changes state to indicate the occurrence of a positive-going zero crossing of an AC input signal. The circuit includes first and second input terminals, a current sensitive switch such as an opto-isolator, first and second current regulators, and a voltage limiter. The first current regulator is connected in series with the current sensitive switch, and the voltage limiter is connected in parallel with the first current regulator and the current sensitive switch. The second current regulator is connected between the first input terminal and the parallel combination of the voltage limiter and the first current regulator and the current sensitive switch. The first current regulator limits current through the current sensitive switch to a first current limit level, and the second current regulator limits current flowing between the first and second input terminals to a second current limit level which is greater than the first current level. The zero crossing detection circuit offers the ability to sense zero crossings of AC input signals having a wide range of AC voltages.
Inventors
- 👤 Earl B. Hockman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 23:11
CPC Classifications
G; G08; G08G; G08G1/00; G08G1/01; G08G1/042; G01; G01R; G01R19/00; G01R19/175
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
221 words
A circuit for producing an output signal having a first state and a second state as a function of an AC input signal, the circuit comprising: first and second input terminals for receiving the AC input signal; current sensitive switch means for producing the output signal when current therethrough is substantially equal to a first current level; a first current regulator connected in a series path with the current sensitive switch means between the first and second input terminals for limiting a current through the current sensitive switch means to said first current level which is substantially constant, essentially independent of the magnitude of said AC input signal, and sufficient to cause the current sensitive switch means to change the output signal from the first state to the second state, while permitting voltage across the first current regulator means to vary; a voltage limiter connected in parallel with the first current regulator and the current sensitive switch means for limiting voltage across the first current regulator and the current sensitive switch means, and a second current regulator connected in series with the first current regulator and the current sensitive switch means between the first and second input terminals for limiting current between the first and second terminals to a second, substantially constant, current level which is greater than the current level.
Claim 2
Dependent Claim
221 words
A circuit for producing an output signal having a first state and a second state as a function of an AC input signal, the circuit comprising: first and second input terminals for receiving the AC input signal; current sensitive switch means for producing the output signal when current therethrough is substantially equal to a first current level; a first current regulator connected in a series path with the current sensitive switch means between the first and second input terminals for limiting a current through the current sensitive switch means to said first current level which is substantially constant, essentially independent of the magnitude of said AC input signal, and sufficient to cause the current sensitive switch means to change the output signal from the first state to the second state, while permitting voltage across the first current regulator means to vary; a voltage limiter connected in parallel with the first current regulator and the current sensitive switch means for limiting voltage across the first current regulator and the current sensitive switch means, and a second current regulator connected in series with the first current regulator and the current sensitive switch means between the first and second input terminals for limiting current between the first and second terminals to a second, substantially constant, current level which is greater than the current level.
Claim 3
Dependent Claim
27 words
The circuit of claim 1 and further comprising: rectifying means connected between the first input terminal and the second current regulator for rectifying the AC input signal.
Claim 4
Dependent Claim
21 words
The circuit of claim 1 wherein the first current regulator comprises a first depletion mode FET and a first sense resistor.
Claim 5
Dependent Claim
40 words
The circuit of claim 3 wherein the first depletion mode FET has a gate and first and second main current carrying electrodes; and wherein the first sense resistor is connected between the second main current carrying electrode and the gate.
Claim 6
Dependent Claim
21 words
The circuit of claim 3 wherein the second current regulator comprises a second depletion mode FET and a second sense resistor.
Claim 7
Dependent Claim
46 words
The circuit of claim 5 wherein the second depletion mode FET has a gate and first and second main current carrying electrodes; and wherein the second sense resistor is connected between the second main current carrying electrode and the gate of the second depletion mode FET.
Claim 8
Dependent Claim
34 words
The circuit of claim 1 wherein the voltage limiter has a first terminal connected to a node between the first and second current regulators and a second terminal connected to the second input terminal.
Claim 9
Dependent Claim
21 words
The circuit of claim 1 wherein the first current level is approximately 1mA and the second current level is approximately 2mA.
Claim 10
Dependent Claim
22 words
The circuit of claim 8 wherein the voltage limiter limits voltage to less than a breakdown voltage of the first current regulator.
Claim 11
Dependent Claim
208 words
A zero crossing detection circuit comprising: first and second input terminals for receiving an AC input signal; current sensitive switch means for providing an output signal having first and second states, and for providing said output signal at said second state when current therethrough is substantially equal to a first current level; first and second current regulators connected in a first current path with the current sensitive switch means between the first and second input terminals, the first current regulator permitting current through the current sensitive switch means to rise to a first current limit level which is substantially constant, essentially independent of the magnitude of said AC input signal and sufficient to cause the output signal to change from the first state to the second state, and the second current regulator limiting current therethrough to a second, substantially constant, higher current limit level; and a voltage limiter for limiting voltage across the current sensitive switch means and the first current regulator, the voltage limiter connected with the second current regulator in a second current path between the first and second input terminals so that current through the second current regulator is divided between the first and second current paths when the input signal reaches a predetermined voltage.
Claim 12
Dependent Claim
208 words
A zero crossing detection circuit comprising: first and second input terminals for receiving an AC input signal; current sensitive switch means for providing an output signal having first and second states, and for providing said output signal at said second state when current therethrough is substantially equal to a first current level; first and second current regulators connected in a first current path with the current sensitive switch means between the first and second input terminals, the first current regulator permitting current through the current sensitive switch means to rise to a first current limit level which is substantially constant, essentially independent of the magnitude of said AC input signal and sufficient to cause the output signal to change from the first state to the second state, and the second current regulator limiting current therethrough to a second, substantially constant, higher current limit level; and a voltage limiter for limiting voltage across the current sensitive switch means and the first current regulator, the voltage limiter connected with the second current regulator in a second current path between the first and second input terminals so that current through the second current regulator is divided between the first and second current paths when the input signal reaches a predetermined voltage.
Claim 13
Dependent Claim
27 words
The circuit of claim 10 and further comprising: rectifying means connected between the first input terminal and the second current regulator for rectifying the AC input signal.
Claim 14
Dependent Claim
21 words
The circuit of claim 10 wherein the first current regulator comprises a first depletion mode FET and a first sense resistor.
Claim 15
Dependent Claim
21 words
The circuit of claim 12 wherein the second current regulator comprises a second depletion mode FET and a second sense resistor.
Claim 16
Dependent Claim
34 words
The circuit of claim 13 wherein the voltage limiter has a first terminal connected to a node between the first and second current regulators and a second terminal connected to the second input terminal.
Claim 17
Dependent Claim
23 words
The circuit of claim 10 wherein the first current limit level is approximately 1mA and the second current limit level is approximately 2mA.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-23 | 1997-02-22 | 1997-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-23 | 2001-02-22 | 2001-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-23 | 2005-02-22 | 2005-08-24 | $7700.00 | Window Closed / Lapsed |