US5237398A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Color difference signal matrix and buffer circuit for television apparatus
Assignee: Technicolor USA Inc
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Filing: 1991-05-28
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Granted: 1993-08-17
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Expires: 2011-05-28
Abstract
Abstract Two transistors are operated individually as emitter follower buffer amplifiers for R-Y and B-Y input signals and are operated together as an inverting summing matrix for deriving a G-Y output signal from the R-Y and B-Y input signals. All three output signals are "buffered" (i.e., provided by low impedance sources) and are subject to substantially equal delays. Advantageously, the circuit implementation requires only two transistors and three resistors to provide output signals which are (1) buffered, (2) matrixed and (3) delay compensated and which features improved reliability (due to reduced "parts count") and an economic implementation of the buffering, delay compensation and matrixing functions.
Inventors
- 👤 Ronald T. Keen
- 👤 Robert L. O'Brien
- 👤 William A. Lagoni
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:00
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/64; H04N9/67
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
184 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the first being positive with respect to the second; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first PNP bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second PNP bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 2
Dependent Claim
184 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the first being positive with respect to the second; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first PNP bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second PNP bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 3
Dependent Claim
184 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the second being positive with respect to the first; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first NPN bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second NPN bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 4
Dependent Claim
184 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the second being positive with respect to the first; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first NPN bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second NPN bi-polar transistor having base, emitter and collector electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 5
Dependent Claim
186 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the first being positive with respect to the second; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first P-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second P-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 6
Dependent Claim
186 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the first being positive with respect to the second; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first P-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second P-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 7
Dependent Claim
186 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the second being positive with respect to the first; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first N-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second N-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
Claim 8
Dependent Claim
186 words
A color difference signal matrix and buffer circuit employing solely two transistors for providing three matrixed and buffered output signals, comprising: first and second input terminals for receiving, respectively, an R-Y video input signal and a B-Y video input signal; first, second and third output terminals for providing, respectively, an R-Y video output signal, a B-Y video output signal and a G-Y video output signal; first and second sources of potential, the second being positive with respect to the first; a first resistor connected between said first source of potential and said first output terminal; a second resistor connected between said first source of potential and said second output terminal; a third resistor connected between said second source of potential and said third output terminal; a first N-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said first input terminal, said first output terminal and said third output terminal; and a second N-channel field effect transistor having gate, source and drain electrodes connected to respective ones of said second input terminal, said second output terminal and said third output terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-16 | 1997-02-15 | 1997-08-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-16 | 2001-02-15 | 2001-08-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-16 | 2005-02-15 | 2005-08-17 | $7700.00 | Window Closed / Lapsed |