MOS semiconductor device formed on insulator

Claim 2

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a first area defined on said first insulating layer and a second area adjacent to said first area on both sides thereof; b) a first conductive layer formed on said first area of said first insulating layer and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of said first conductive layer as well as said second area of said first insulating layer but not said first area, and d) a single continuous semiconductor layer covering said second insulating layer, said continuous semiconductor layer defining: a first part extending on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part jointed with said first part and extending on the side surface of said first conductive layer, said second part including impurities of a second conductivity type different from the first conductivity type; and a third part, jointed with said second part and extending over said second insulating layer at a portion which covers said second area of said first insulating layer, said third part also including impurities of the first conductivity type.

Claim 3

An MOS type semiconductor device according to claim 1, further comprising a semiconductor substrate, on which said first insulating layer is formed.

Claim 4

An MOS type semiconductor device according to claim 1, wherein said first conductive layer contains a semiconductor material including impurities at a high concentration.

Claim 5

An MOS type semiconductor device according to claim 1, wherein said first conductive layer contains at least one of aluminum, copper, chromium, molybdenum and wolfram.

Claim 6

An MOS type semiconductor device according to claim 1, wherein said first conductive layer contains silicide of a metal.

Claim 7

An MOS type semiconductor device according to claim 1, wherein said second insulating layer contains a silicon nitride film or a silicon oxide film or a composite film thereof.

Claim 8

An MOS type semiconductor device according to claim 1, wherein said first conductivity type is a P conductivity type, and said second conductivity type is an N conductivity type.

Claim 9

An MOS type semiconductor device according to claim 1, wherein said first conductivity type is an N conductivity type and said second conductivity type is a P conductivity type.

Claim 10

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a plurality of first areas defined on said first insulating layer and second areas adjacent to said first areas and alternating therewith; b) a plurality of first conductive layers formed selectively on said first areas of said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said second area of said first insulating layer adjacent to said side surface; and d) a continuous semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer of said continuous semiconductor layer defining: a first part extending over the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part of said continuous semiconductor layer extending adjacent to said first part and on the side surface of said first conductive layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part extending over a portion of said second insulating layer which covers said second area of said first insulating layer, and adjacent said second part, said third part including impurities of the first conductivity type.

Claim 11

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a plurality of first areas defined on said first insulating layer and second areas adjacent to said first areas and alternating therewith; b) a plurality of first conductive layers formed selectively on said first areas of said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said second area of said first insulating layer adjacent to said side surface; and d) a continuous semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer of said continuous semiconductor layer defining: a first part extending over the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part of said continuous semiconductor layer extending adjacent to said first part and on the side surface of said first conductive layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part extending over a portion of said second insulating layer which covers said second area of said first insulating layer, and adjacent said second part, said third part including impurities of the first conductivity type.

Claim 12

An MOS type semiconductor device according to claim 9, further comprising a semiconductor substrate, on which said first insulating layer is formed.

Claim 13

An MOS type semiconductor device according to claim 9, wherein said first conductive layers contain a semiconductor material including impurities at a high concentration.

Claim 14

An MOS type semiconductor device according to claim 9, wherein said first conductive layers contain at least one of aluminum, copper, chromium, molybdenum and wolfram.

Claim 15

An MOS type semiconductor device according to claim 9, wherein said first conductive layers contain silicide of a metal.

Claim 16

An MOS type semiconductor device according to claim 9, wherein said second insulating layer contains a silicon nitride film or a silicon oxide film or a composite film thereof.

Claim 17

An MOS type semiconductor device according o claim 9, wherein said first conductivity type is a P conductivity type and said second conductivity type is an N conductivity type.

Claim 18

An MOS type semiconductor device according to claim 9, wherein said first conductivity type is an N conductivity type and said second conductivity type is a P conductivity type.

Claim 19

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a first area defined on said first insulating layer and second area adjacent to said first area; b) a conductive layer formed on said first area of said first insulating layer, and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface and said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of said conductive layer; and d) a single semiconductor layer covering said second insulating layer and defining: a first part formed on the upper surface of said conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part disposed on said second area of said first insulating layer, said third part being jointed with said second part, said third part including impurities of the first conductivity type.

Claim 20

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a first area defined on said first insulating layer and second area adjacent to said first area; b) a conductive layer formed on said first area of said first insulating layer, and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface and said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of said conductive layer; and d) a single semiconductor layer covering said second insulating layer and defining: a first part formed on the upper surface of said conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part disposed on said second area of said first insulating layer, said third part being jointed with said second part, said third part including impurities of the first conductivity type.

Claim 21

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a first area defined on said first insulating layer and a second area adjacent to said first area; b) a conductive layer formed on said first insulating layer and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface of said conductive layer as well as said second area of said first insulating layer; and d) a single semiconductor layer formed on said second insulating layer and defining a first part disposed on the upper surface of said conductive layer, said first part including impurities of a first conductivity type at a high concentration; a second part disposed on the side surface of said conductive layer adjacent said first part, said second part including impurities of a second conductivity type at a concentration lower than said first part, and a third part disposed at an area, where said second insulating layer covers said second area of said first insulating layer, and adjacent said second part, said third part including impurities of the first conductivity type at a concentration higher than said second part.

Claim 22

An MOS type semiconductor device comprising: a) a first insulating layer having a thickness larger than 0.1 μm and having a first area defined on said first insulating layer and a second area adjacent to said first area; b) a conductive layer formed on said first insulating layer and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface of said conductive layer as well as said second area of said first insulating layer; and d) a single semiconductor layer formed on said second insulating layer and defining a first part disposed on the upper surface of said conductive layer, said first part including impurities of a first conductivity type at a high concentration; a second part disposed on the side surface of said conductive layer adjacent said first part, said second part including impurities of a second conductivity type at a concentration lower than said first part, and a third part disposed at an area, where said second insulating layer covers said second area of said first insulating layer, and adjacent said second part, said third part including impurities of the first conductivity type at a concentration higher than said second part.

Claim 23

An MOS type semiconductor device according to claim 18, wherein said first part of said semiconductor layer includes the impurities at about the same concentration as that of said third part.

Claim 24

An MOS type semiconductor device comprising: a) a first insulating layer; b) a first conductive layer formed on said first insulating layer and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of said first conductive layer as well as said first insulating layer, and d) a semiconductor layer covering said second insulating layer and defining a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from the first conductivity type; and a third part formed at a place, where said first insulating layer covers directly said second insulating layer, and jointed with said second part, said third part including impurities of the first conductivity type; e) a third insulating layer covering said first part, said second part and said third part of said semiconductor layer; and f) a second conductive layer formed on said third insulating layer principally at a place covering said second part of said semiconductor layer.

Claim 25

An MOS type semiconductor device comprising: a) a first insulating layer; b) a first conductive layer formed on said first insulating layer and having an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of said first conductive layer as well as said first insulating layer, and d) a semiconductor layer covering said second insulating layer and defining a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from the first conductivity type; and a third part formed at a place, where said first insulating layer covers directly said second insulating layer, and jointed with said second part, said third part including impurities of the first conductivity type; e) a third insulating layer covering said first part, said second part and said third part of said semiconductor layer; and f) a second conductive layer formed on said third insulating layer principally at a place covering said second part of said semiconductor layer.

Claim 26

An MOS type semiconductor device comprising: a) a first insulating layer; b) a plurality of first conductive layers formed selectively on said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said first insulating layer adjacent to said side surface; and d) a semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer having a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part formed at a place, where said second insulating layer covers directly said first insulating layer, and is jointed with said second part, said third part including impurities of the first conductivity type; e) a third insulating layer covering said first part, said second part and said third part of said semiconductor layer; and f) a second conductive layer formed on said third insulating layer principally at a place covering said second part of said semiconductor layer.

Claim 27

An MOS type semiconductor device comprising: a) a first insulating layer; b) a plurality of first conductive layers formed selectively on said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said first insulating layer adjacent to said side surface; and d) a semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer having a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part formed at a place, where said second insulating layer covers directly said first insulating layer, and is jointed with said second part, said third part including impurities of the first conductivity type; e) a third insulating layer covering said first part, said second part and said third part of said semiconductor layer; and f) a second conductive layer formed on said third insulating layer principally at a place covering said second part of said semiconductor layer.

Claim 28

An MOS type semiconductor device according to claim 21, further comprising connecting means for electrically connecting selected one of said first conducive layers or electrically connecting selected one of said third parts of said semiconductor layer.

Claim 29

An MOS type semiconductor device comprising: a) a first insulating layer; b) a plurality if first conductive layers formed selectively on said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said first insulating layer adjacent to said side surface; and d) a semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer having a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part formed at a place, where said second insulating layer covers directly said first insulating layer, and jointed with said second part, said third part including impurities of the first conductivity type; wherein said semiconductor layer includes a first semiconductor region, in which said first part is an N conductivity layer, said second part is a P conductivity type layer, and said third part is an N conductivity type layer, and a second semiconductor region, in which said first part is a P conductivity type layer, said second part is an N conductivity type layer, and said third part is a P conductivity type layer.

Claim 30

An MOS type semiconductor device comprising: a) a first insulating layer; b) a plurality if first conductive layers formed selectively on said first insulating layer, each of which has an upper surface distant from said first insulating layer and a side surface connecting said upper surface to said first insulating layer; c) a second insulating layer covering the upper surface and the side surface of each of said first conductive layers as well as said first insulating layer adjacent to said side surface; and d) a semiconductor layer covering said second insulating layer, said semiconductor layer being formed on said first insulating layer in separate elemental layers corresponding to the respective first conductive layers, each elemental layer having a first part formed on the upper surface of said first conductive layer, said first part including impurities of a first conductivity type; a second part formed on the side surface of said first conductive layer and jointed with said first part, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part formed at a place, where said second insulating layer covers directly said first insulating layer, and jointed with said second part, said third part including impurities of the first conductivity type; wherein said semiconductor layer includes a first semiconductor region, in which said first part is an N conductivity layer, said second part is a P conductivity type layer, and said third part is an N conductivity type layer, and a second semiconductor region, in which said first part is a P conductivity type layer, said second part is an N conductivity type layer, and said third part is a P conductivity type layer.

Claim 31

An MOS type semiconductor device of an SOI structure comprising an insulating base having a first area defined on said first insulating base and a second area adjacent to said first area and one or more semiconductor elements formed on said insulating base, each of said semiconductor elements including: a) a first layer of electrically conductive material formed on said first area of said insulating base and having an upper surface spaced from said insulating base and a side surface connecting said upper surface and said insulating base; b) a second layer of dielectric material covering the upper surface and the side surface of said first layer, as well as said second area of said insulating base; c) a semiconductor layer covering said second layer and defining: a first part extending on the upper surface of said first layer, said first part including impurities of a first conductivity type; a second part jointed with said first part and extending on the side surface of said first layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part jointed with said second part and extending over an area of said second layer which covers said second area of said insulating base, said third part including impurities of said first conductivity type.

Claim 32

An MOS type semiconductor device of an SOI structure comprising an insulating base having a first area defined on said first insulating base and a second area adjacent to said first area and one or more semiconductor elements formed on said insulating base, each of said semiconductor elements including: a) a first layer of electrically conductive material formed on said first area of said insulating base and having an upper surface spaced from said insulating base and a side surface connecting said upper surface and said insulating base; b) a second layer of dielectric material covering the upper surface and the side surface of said first layer, as well as said second area of said insulating base; c) a semiconductor layer covering said second layer and defining: a first part extending on the upper surface of said first layer, said first part including impurities of a first conductivity type; a second part jointed with said first part and extending on the side surface of said first layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part jointed with said second part and extending over an area of said second layer which covers said second area of said insulating base, said third part including impurities of said first conductivity type.

Claim 33

An MOS type semiconductor device according to claim 24, wherein said insulating base has a thickness larger than 0.1 μm.

Claim 34

An MOS type semiconductor device of an SOI structure comprising an insulating base having a first area defined on said first insulating base and a second area adjacent to said first area and at least one MOS type semiconductor element formed on said insulating base, said semiconductor element comprising: a) an electrically conductive layer formed on first area of said insulating base, said electrically conductive layer having an upper surface spaced from said insulating base and a side surface connecting said upper surface and said insulating base; b) a dielectric layer extending to cover the upper surface and the side surface of said conductive layer and to cover the second area of said insulating base; c) a semiconductor layer extending to cover said dielectric layer and defining: a first part disposed on the upper surface of said electrically conductive layer, said first part including impurities of a first conductivity type; a second part jointed with said first part and disposed on the side surface of said electrically conductive layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part jointed with said second part and disposed on said second area of said insulating base, said third part including impurities of said first conductivity type.

Claim 35

An MOS type semiconductor device of an SOI structure comprising an insulating base having a first area defined on said first insulating base and a second area adjacent to said first area and at least one MOS type semiconductor element formed on said insulating base, said semiconductor element comprising: a) an electrically conductive layer formed on first area of said insulating base, said electrically conductive layer having an upper surface spaced from said insulating base and a side surface connecting said upper surface and said insulating base; b) a dielectric layer extending to cover the upper surface and the side surface of said conductive layer and to cover the second area of said insulating base; c) a semiconductor layer extending to cover said dielectric layer and defining: a first part disposed on the upper surface of said electrically conductive layer, said first part including impurities of a first conductivity type; a second part jointed with said first part and disposed on the side surface of said electrically conductive layer, said second part including impurities of a second conductivity type different from said first conductivity type; and a third part jointed with said second part and disposed on said second area of said insulating base, said third part including impurities of said first conductivity type.

Claim 36

An MOS type semiconductor device according to claim 26, wherein said insulating base has a thickness larger than about 0.1 μm.