Phaseshift network for an IQ modulator

Claim 2

A phaseshift network, comprising: a first branch having an input node for receiving a first frequency signal that varies within a range of frequencies about a frequency Fo and including means for providing, at an output node of said first branch, a frequency signal representative of the first input signal that is retarded by a first predetermined number of degrees; a second branch having an input node for receiving a second frequency signal that varies within a range of frequencies about the frequency Fo and including means for providing, at an output node of said second branch, a frequency signal representative of the second input signal that is advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is a summation of the retarded and the advanced frequency signals; wherein said second branch includes first circuit means for equalizing an insertion loss of said second branch to an insertion loss of said first branch, and wherein said first branch includes second circuit means for equalizing an input impedance of said first branch, at Fo, to an input impedance of said second branch, at Fo.

Claim 3

A phaseshift network as set forth in claim 1 wherein: said circuit means of said second branch includes a resistance coupled in series between said input node and said frequency signal providing means for equalizing the insertion loss of said second branch to the insertion loss of said first branch, and wherein said circuit means of said first branch includes a capacitance coupled between said input node and a common potential for equalizing the input impedance of said first branch, at Fo, to the input impedance of said second branch, at Fo.

Claim 4

A phaseshift network as set forth in claim 1 wherein said first predetermined number of degrees equals 45°, wherein said second predetermined number of degrees equals 45°, and wherein said output signal is representative of a 90° phaseshift between said first input signal and said second input signal.

Claim 5

A phaseshift network as set forth in claim 1 wherein said providing means of said first branch includes a resistance having a first terminal coupled to said input node, a second terminal coupled to said output node, and a capacitance having a first terminal coupled to said second terminal of said resistance and a second terminal coupled to the common potential, and wherein said providing means of said second branch includes a capacitance having a first terminal coupled to said input node, a second terminal coupled to said output node, and a resistance having a first terminal coupled to said second terminal of said capacitance and a second terminal coupled to the common potential.

Claim 6

A phaseshift network as set forth in claim 4 wherein said summing means includes a first resistance having a first terminal coupled to said output node of said first providing means and a second terminal coupled to said output node of said summing means, said summing means further including a second resistance having a first terminal coupled to said output node of said second providing means and a second terminal coupled to said output node of said summing means, said summing means further including a third resistance having a first terminal coupled to said output node of said summing means and a second terminal coupled to the common potential.

Claim 7

A phaseshift network as set forth in claim 5 wherein said summing means includes a capacitance coupled in series between said second terminal of said first resistance and said output node of said summing means for equalizing an input impedance of said first branch and said second branch over a range of frequencies that modulates Fo.

Claim 8

A phaseshift network as set forth in claim 1 wherein said input node of said first branch is coupled to a first output node of a single balanced mixer means, and wherein said input node of said second branch is coupled to a second output node of said single balanced mixer means.

Claim 9

A phaseshift network, comprising: a first branch having an input node for receiving a first frequency signal that varies within a range about a frequency Fo and including means for providing, at an output node of said first branch, a frequency signal representative of the first input signal that is retarded by a first predetermined number of degrees; a second branch having an input node for receiving a second frequency signal that varies within a range about the frequency Fo and including means for providing, at an output node of said second branch, a frequency signal representative of the second input signal that is advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is the summation of the retarded and the advanced frequency signals, said summing means including a first resistance having a first terminal coupled to said output node of said first providing means and a second terminal coupled to said output node of said summing means, said summing means further including a second resistance having a first terminal coupled to said output node of said second providing means and a second terminal coupled to said output node of said summing means, said summing means further including a third resistance having a first terminal coupled to said output node of said summing means and a second terminal coupled to a common potential; wherein said first branch includes a capacitance coupled between said input node and the common potential for equalizing an input impedance of said first branch, at Fo, to an input impedance of said second branch, at Fo; wherein said summing means includes a capacitance coupled in series between said second terminal of said first resistance and said output node of said summing means for equalizing an input impedance of said first branch and said second branch over the range of frequencies that modulates Fo; and wherein said second branch includes a resistance having a first terminal coupled to said input node and a second terminal coupled to a first terminal of a capacitance, said capacitance having a second terminal coupled to said output node of said second branch, said resistance equalizing an insertion loss of said second branch to an insertion loss of said first branch, and said capacitance equalizing a delay time between said first branch and said second branch by compensating for an effect of the capacitance of said summing means over the range of frequencies that modulates Fo.

Claim 10

A phaseshift network, comprising: a first branch having an input node for receiving a first frequency signal that varies within a range about a frequency Fo and including means for providing, at an output node of said first branch, a frequency signal representative of the first input signal that is retarded by a first predetermined number of degrees; a second branch having an input node for receiving a second frequency signal that varies within a range about the frequency Fo and including means for providing, at an output node of said second branch, a frequency signal representative of the second input signal that is advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is the summation of the retarded and the advanced frequency signals, said summing means including a first resistance having a first terminal coupled to said output node of said first providing means and a second terminal coupled to said output node of said summing means, said summing means further including a second resistance having a first terminal coupled to said output node of said second providing means and a second terminal coupled to said output node of said summing means, said summing means further including a third resistance having a first terminal coupled to said output node of said summing means and a second terminal coupled to a common potential; wherein said first branch includes a capacitance coupled between said input node and the common potential for equalizing an input impedance of said first branch, at Fo, to an input impedance of said second branch, at Fo; wherein said summing means includes a capacitance coupled in series between said second terminal of said first resistance and said output node of said summing means for equalizing an input impedance of said first branch and said second branch over the range of frequencies that modulates Fo; and wherein said second branch includes a resistance having a first terminal coupled to said input node and a second terminal coupled to a first terminal of a capacitance, said capacitance having a second terminal coupled to said output node of said second branch, said resistance equalizing an insertion loss of said second branch to an insertion loss of said first branch, and said capacitance equalizing a delay time between said first branch and said second branch by compensating for an effect of the capacitance of said summing means over the range of frequencies that modulates Fo.

Claim 11

A phaseshift network as set forth in claim 8 wherein said first predetermined number of degrees equal 45°, wherein said second predetermined number of degrees equals 45°, and wherein said output signal is representative of a 90° phaseshift between said first input signal and said second input signal.

Claim 12

A phaseshift network as set forth in claim 8 wherein said providing means of said first branch includes a resistance having a first terminal coupled to said input node, a second terminal coupled to said output node, and a capacitance having a first terminal coupled to said second terminal of said resistance and a second terminal coupled to the common potential, and wherein said providing means of said second branch includes a capacitance having a first terminal coupled to said input node, a second terminal coupled to said output node, and a resistance having a first terminal coupled to said second terminal of said capacitance and a second terminal coupled to the common potential.

Claim 13

A phaseshift network as set forth in claim 8 wherein said input node of said first branch is coupled to a first output node of a single balanced mixer means, and wherein said input node of said second branch is coupled to a second output node of said single balanced mixer means.

Claim 14

An IQ modulator, comprising: single balanced mixer means having a first input for receiving a reference frequency signal Fo, a second input for receiving an in-phase modulation signal, and a third input for receiving a quadrature modulation signal, said mixer means having a first output providing a first frequency signal and a second output providing a second frequency signal; a first branch having an input node coupled to said first output of said mixer means for receiving said first frequency signal, said first branch including means for providing, at an output node of said first branch, a first output frequency signal that is representative of the first frequency signal retarded by a first predetermined number of degrees; a second branch having an input node coupled to said second output of said mixer means for receiving said second frequency signal, said second branch including means for providing, at an output node of said second branch, a second output frequency signal that is representative of the second frequency signal advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is a summation of the retarded and the advanced frequency signals.

Claim 15

An IQ modulator, comprising: single balanced mixer means having a first input for receiving a reference frequency signal Fo, a second input for receiving an in-phase modulation signal, and a third input for receiving a quadrature modulation signal, said mixer means having a first output providing a first frequency signal and a second output providing a second frequency signal; a first branch having an input node coupled to said first output of said mixer means for receiving said first frequency signal, said first branch including means for providing, at an output node of said first branch, a first output frequency signal that is representative of the first frequency signal retarded by a first predetermined number of degrees; a second branch having an input node coupled to said second output of said mixer means for receiving said second frequency signal, said second branch including means for providing, at an output node of said second branch, a second output frequency signal that is representative of the second frequency signal advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is a summation of the retarded and the advanced frequency signals.

Claim 16

An IQ modulator as set forth in claim 12 wherein: said second branch includes first circuit means for equalizing an insertion loss of said second branch to an insertion loss of said first branch, and wherein said first branch includes second circuit means for equalizing an input impedance of said first branch, at Fo, to an input impedance of said second branch, at Fo.

Claim 17

An IQ modulator as set forth in claim 12 wherein said first predetermined number of degrees equals 45°, wherein said second predetermined number of degrees equals 45°.

Claim 18

A phaseshift network, comprising: a first branch having an input node for receiving a first frequency signal that varies within a range of frequencies about a frequency Fo and including means for providing, at an output node of said first branch, a frequency signal representative of the first input signal that is retarded by a first predetermined number of degrees; a second branch having an input node for receiving a second frequency signal that varies within a range of frequencies about the frequency Fo and including means for providing, at an output node of said second branch, a frequency signal representative of the second input signal that is advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is a summation of the retarded and the advanced frequency signals; wherein said input node of said first branch is coupled to a first output node of a single balanced mixer means, and wherein said input node of said second branch is coupled to a second output node of said single balanced mixer means.

Claim 19

A phaseshift network, comprising: a first branch having an input node for receiving a first frequency signal that varies within a range of frequencies about a frequency Fo and including means for providing, at an output node of said first branch, a frequency signal representative of the first input signal that is retarded by a first predetermined number of degrees; a second branch having an input node for receiving a second frequency signal that varies within a range of frequencies about the frequency Fo and including means for providing, at an output node of said second branch, a frequency signal representative of the second input signal that is advanced by a second predetermined number of degrees; and summing means, having a first input node coupled to said output node of said first branch and a second input node coupled to said output node of said second branch, for summing together the retarded and advanced frequency signals and for providing at an output node an output signal that is a summation of the retarded and the advanced frequency signals; wherein said input node of said first branch is coupled to a first output node of a single balanced mixer means, and wherein said input node of said second branch is coupled to a second output node of said single balanced mixer means.

Claim 20

A phaseshift network as set forth in claim 15 wherein: p1 said second branch includes a resistance coupled in series between said input node and said frequency signal providing means for equalizing an insertion loss of said second branch to an insertion loss of said first branch, and wherein said first branch includes a capacitance coupled between said input node and a common potential for equalizing an input impedance of said first branch, at Fo, to an input impedance of said second branch, at Fo.

Claim 21

A phaseshift network as set forth in claim 15 wherein said first predetermined number of degrees equals 45°, wherein said second predetermined number of degrees equals 45°, and wherein said output signal is representative of a 90° phaseshift between said first input signal and said second input signal.

Claim 22

A phaseshift network as set forth in claim 15 wherein said providing means of said first branch includes a resistance having a first terminal coupled to said input node, a second terminal coupled to said output node, and a capacitance having a first terminal coupled to said second terminal of said resistance and a second terminal coupled to the common potential, and wherein said providing means of said second branch includes a capacitance having a first terminal coupled to said input node, a second terminal couple to said output node, and a resistance having a first terminal coupled to said second terminal of said capacitance and a second terminal coupled to the common potential.

Claim 23

A phaseshift network as set forth in claim 18 wherein said summing means includes a first resistance having a first terminal coupled to said output node of said first providing means and a second terminal coupled to said output node of said summing means, said summing means further including a second resistance having a first terminal coupled to said output node of said second providing means and a second terminal coupled to said output node of said summing means, said summing means further including a third resistance having a first terminal coupled to said output node of said summing means and a second terminal coupled to the common potential.

Claim 24

A phaseshift network as set forth in claim 19 wherein said summing means includes a capacitance coupled in series between said second terminal of said first resistance and said output node of said summing means for equalizing an input impedance of said first branch and said second branch over a range of frequencies that modulates Fo.