Integrated circuit with means to prevent its logic output circuit breakdown

Claim 2

An integrated circuit comprising: a logic output circuit having a resisting voltage condition which is a predetermined voltage lower than a low voltage level in an output terminal of said logic output circuit; conducting means connected to said output terminal of said logic output circuit for conducting when voltage exceeding said resisting voltage condition of said logic output circuit is applied to said output terminal, said conducting means including transistors and diodes which are connected in series; trigger-voltage generating means connected to said conducting means for generating a trigger voltage when said conducting means conducts; and control means provided between said trigger-voltage generating means and said logic output circuit to turn off said logic output circuit in response to said trigger voltage from said trigger-voltage generating means.

Claim 3

An integrated circuit as set forth in claim 1, wherein said logic output circuit is constructed such that when an applied voltage in an input terminal of said output circuit is a logic 0, voltage in said output terminal of said output circuit goes to a high voltage corresponding to a logic 1, and that when said applied voltage in said input terminal is a logic 1, said voltage in said output terminal goes to a low voltage corresponding to a logic 0.

Claim 4

An integrated circuit as set forth in claim 1, wherein said trigger-voltage generating means comprises a plurality of resistors.

Claim 5

An integrated circuit as set forth in claim 1, wherein said control means comprises a transistor with a schottky diode, and a plurality of schottky diodes.

Claim 6

An integrated circuit comprising: a logic output circuit having a first resisting voltage condition which is a predetermined voltage lower than a low voltage level in an output terminal of said logic output circuit and having a second resisting voltage condition which is a predetermined voltage higher than a high voltage level in said output terminal of said logic output circuit; first conducting means connected to said output terminal of said logic output circuit for conducting when voltage exceeding said first resisting voltage condition of said logic output circuit is applied to said output terminal; first trigger-voltage generating means connected to said first conducting means for generating a first trigger voltage when said first conducting means conducts; first control means provided between said first trigger-voltage generating means and said logic output circuit to turn off said logic output circuit in response to said first trigger voltage from said first trigger-voltage generating means; second conducting means connected to said output terminal of said logic output circuit for conducting when voltage exceeding said second resisting voltage condition of said logic output circuit is applied to said output terminal; second trigger-voltage generating means connected to said second conducting means for generating a second trigger voltage when said second conducting means conducts; and second control means provided between said second trigger-voltage generating means and said logic output circuit to connect an input terminal of said logic output circuit with a power line of voltage corresponding to a logic low.

Claim 7

An integrated circuit comprising: a logic output circuit having a first resisting voltage condition which is a predetermined voltage lower than a low voltage level in an output terminal of said logic output circuit and having a second resisting voltage condition which is a predetermined voltage higher than a high voltage level in said output terminal of said logic output circuit; first conducting means connected to said output terminal of said logic output circuit for conducting when voltage exceeding said first resisting voltage condition of said logic output circuit is applied to said output terminal; first trigger-voltage generating means connected to said first conducting means for generating a first trigger voltage when said first conducting means conducts; first control means provided between said first trigger-voltage generating means and said logic output circuit to turn off said logic output circuit in response to said first trigger voltage from said first trigger-voltage generating means; second conducting means connected to said output terminal of said logic output circuit for conducting when voltage exceeding said second resisting voltage condition of said logic output circuit is applied to said output terminal; second trigger-voltage generating means connected to said second conducting means for generating a second trigger voltage when said second conducting means conducts; and second control means provided between said second trigger-voltage generating means and said logic output circuit to connect an input terminal of said logic output circuit with a power line of voltage corresponding to a logic low.

Claim 8

An integrated circuit as set forth in claim 5, wherein a schottky barrier diode is provided between said output terminal of said logic output circuit and said first control means so that the anode of said diode is connected to said first control means and the cathode of said diode is connected to said output terminal of said logic output circuit.

Claim 9

An integrated circuit as set forth in claim 5, wherein said logic output circuit is constructed such that when an applied voltage in said input terminal of said output circuit is a logic 0, voltage in said output terminal of said output circuit goes to a high voltage corresponding to a logic 1 and when said applied voltage in said input terminal is a logic 1, said voltage in said output terminal goes to a low voltage corresponding to a logic 0.

Claim 10

An integrated circuit as set forth in claim 5, wherein said first conducting means comprises transistors and diodes which are connected in series and wherein said second conducting means comprises transistors and diodes which are connected in series.

Claim 11

An integrated circuit as set forth in claim 5, wherein said first conducting means comprises diodes which are connected in series and wherein said second conducting means comprises diodes which are connected in series.

Claim 12

An integrated circuit as set forth in claim 5, wherein said first conducting means comprises transistors which are connected in series and wherein said second conducting means comprises transistors which are connected in series.

Claim 13

An integrated circuit as set forth in claim 5, wherein said first trigger-voltage generating means comprises a plurality of resistors and wherein said second trigger-voltage generating means comprises a plurality of resistors.

Claim 14

An integrated circuit as set forth in claim 5, wherein said first control means comprises a transistor with a schottky diode, and a plurality of schottky diodes and wherein said second control means comprises a transistor with a schottky diode.