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US5229325A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming metal wirings of semiconductor device

Assignee: Samsung Electronics Co Ltd
•
Filing: 1991-09-12
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Granted: 1993-07-20
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Expires: 2011-09-12
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Abstract

Abstract A method for forming metal wires of a semiconductor device includes the steps of first forming about half of the total metal wires, the wires being arranged at regular intervals, forming sidewall spacers made of insulating materials on the metal wires using an etchback method, and forming the rest of the total wires at spaces between the wires of the first half, again using an etchback process. This results in a wire structure in which a gap between adjacent metal wires is about 0.1 microns in width.

Inventors

  • 👤 Jong-Ho Park
  • 👤 Deok-Min Lee
  • 👤 Sang-in Lee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 11:26
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/062

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 192 words
A method of wiring a semiconductor device, comprising the steps of: (1) forming a first insulating layer on a semiconductor substrate; (2) forming contact holes in said first insulating layer; (3) forming a first smooth metal layer on the entire surface of said first insulating layer, the first smooth metal layer completely filling said contact holes; (4) forming a first group of metal wires by applying a photolithographic process to said first smooth metal layer, each wire of the first group being arranged at regular intervals; (5) forming sidewall insulating spacers on side surfaces of each wire of said first group of metal wires and etching said first insulating layer between said sidewall spacers to an even depth; (6) forming a second smooth metal layer on the entire surface of the structure which results from step (5), the second smooth metal layer completely filling spaces between said sidewall spacers; and (7) forming a second group of metal wires on said spaces between said sidewall spacers by anisotropically etching said smooth second metal layer, the second group of metal wires being insulated from said first group of metal wires by said sidewall spacers.
Claim 2
Independent Claim 192 words
A method of wiring a semiconductor device, comprising the steps of: (1) forming a first insulating layer on a semiconductor substrate; (2) forming contact holes in said first insulating layer; (3) forming a first smooth metal layer on the entire surface of said first insulating layer, the first smooth metal layer completely filling said contact holes; (4) forming a first group of metal wires by applying a photolithographic process to said first smooth metal layer, each wire of the first group being arranged at regular intervals; (5) forming sidewall insulating spacers on side surfaces of each wire of said first group of metal wires and etching said first insulating layer between said sidewall spacers to an even depth; (6) forming a second smooth metal layer on the entire surface of the structure which results from step (5), the second smooth metal layer completely filling spaces between said sidewall spacers; and (7) forming a second group of metal wires on said spaces between said sidewall spacers by anisotropically etching said smooth second metal layer, the second group of metal wires being insulated from said first group of metal wires by said sidewall spacers.
Claim 3
Dependent Claim 17 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises sputtering.
Claim 4
Dependent Claim 20 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises chemical vapor deposition process.
Claim 5
Dependent Claim 21 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises the step of depositing aluminum.
Claim 6
Dependent Claim 35 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises the step of depositing an aluminum alloy including aluminum and one of Si, Cu, Ti, Pd, Hf, and B.
Claim 7
Dependent Claim 35 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises the steps of: forming a barrier layer; and forming an aluminum layer on the top of said barrier layer.
Claim 8
Dependent Claim 26 words
A method for wiring as in claim 6, wherein forming said barrier layer comprises the step of layering one of Ti/TiN, MoSix, TiW, TiSix, and W.
Claim 9
Dependent Claim 36 words
A method for wiring as in claim 1, wherein each of steps (3) and (6) comprises the steps of: forming a barrier layer; and forming an aluminum alloy layer on the top of said barrier layer.
Claim 10
Dependent Claim 26 words
A method for wiring as in claim 8, wherein forming said barrier layer comprises the step of layering one of Ti/TiN, MoSix, TiW, TiSix, and W.
Claim 11
Dependent Claim 27 words
A method for wiring as in claim 1, wherein step (5) comprises the step of forming sidewall spacers comprising one of SixNy, SixOyNz, USG, PSG, and BPSG.
Claim 12
Dependent Claim 50 words
A method for wiring as in claim 1, wherein step (5) comprises the steps of: depositing said second insulating layer on the entire surface of the structure resulting from step (4), the depositing step including a plasma low-temperature deposition process; and etching said second insulating layer by an etchback method.
Claim 13
Dependent Claim 49 words
A method for wiring as in claim 1, wherein step (5) comprises the steps of: depositing said second insulating layer on the entire surface of the structure resulting from step (4), the depositing step including an atmospheric-pressure CVD method; and etching said second insulating layer by an etchback method.
Claim 14
Dependent Claim 27 words
A method for wiring as in claim 1, wherein said sidewall insulating spacers of step (5) are formed having a width which is thicker than 0.1 microns.
Claim 15
Independent Claim 126 words
A method for forming wires on a semiconductor device, comprising the steps of: forming a first group of metal wires, each wire arranged at a given interval from wires which are adjacent to said each wire; forming sidewall spacers comprising an insulating material on side surfaces of each wire of said first group of metal wires using an etchback method; and forming a second group of metal wires, each wire of the second group being placed in a spacing between two adjacent metal wires of said first group using an etchback method, the second group of metal wires being aligned to said first group of metal wires, each wire of the second group being separated form each wire of the first group by said sidewall spacers.
Claim 16
Independent Claim 126 words
A method for forming wires on a semiconductor device, comprising the steps of: forming a first group of metal wires, each wire arranged at a given interval from wires which are adjacent to said each wire; forming sidewall spacers comprising an insulating material on side surfaces of each wire of said first group of metal wires using an etchback method; and forming a second group of metal wires, each wire of the second group being placed in a spacing between two adjacent metal wires of said first group using an etchback method, the second group of metal wires being aligned to said first group of metal wires, each wire of the second group being separated form each wire of the first group by said sidewall spacers.

References Cited (Backward Citations)

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EP0083089A2 Cited
US4424621A Cited
DE3614793A1 Cited
EP0224013A2 Cited
US4789648A Cited
EP0365492A2 Cited
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US5104826A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-07-19 1997-01-18 1997-07-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-07-19 2001-01-18 2001-07-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-07-19 2005-01-18 2005-07-20 $7700.00 Window Closed / Lapsed

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