Operational method and apparatus over GF(2m) using a subfield GF(2.sup.

Claim 2

An operational apparatus over Galois Field GF(2 8 ) using subfield Galois Field GF(2 4 ) in which a primitive polynomial equation of GF(2 8 ) is P(x)=x 8 +x 4 +x 3 +x 2 +1 and a primitive polynomial equation of GF(2 4 ) is P(x)=x 4 +x 3 +1 comprising: converting means satisfying the equations z.sub.0 =b.sub.0 +b.sub.1 +b.sub.5 z.sub.1 =b.sub.1 +b.sub.3 +b.sub.5 z.sub.2 =b.sub.2 +b.sub.3 +b.sub.6 z.sub.3 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.6 z.sub.4 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.5 +b.sub.6 +b.sub.7 z.sub.5 =b.sub.2 +b.sub.5 +b.sub.6 z.sub.6 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.4 +b.sub.5 +b.sub.6 z.sub.7 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.5 for converting elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ) and representing digital information, into elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ); operational means for receiving said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 of said converting means and performing a mathematical operation in GF(2 4 ) on said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 ; and reversion means satisfying the equations b.sub.0 =z.sub.0 +z.sub.1 +z.sub.2 +z.sub.6 +z.sub.7 b.sub.1 =z.sub.1 +z.sub.2 +z.sub.5 b.sub.2 =z.sub.3 +z.sub.5 +z.sub.7 b.sub.3 =z.sub.2 +z.sub.6 +z.sub.7 b.sub.4 =z.sub.1 +z.sub.7 b.sub.5 =z.sub.5 +z.sub.6 +z.sub.7 b.sub.6 =z.sub.3 +z.sub.5 +z.sub.6 b.sub.7 =z.sub.1 +z.sub.4 +z.sub.6 +z.sub.7 for reverting said operated elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ) into operated elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ); wherein said operational means comprises: a first multiplier over GF(2 4 ) for receiving and producing the product of a higher-order 4-bit signal of numbers A and B through said converting means; a second multiplier over GF(2 4 ) for receiving and producing the product of a lower-order 4-bit signal of numbers A and B through said converting means; a first adder over GF(2 4 ) for receiving and adding said higher-order 4-bit signal and lower-order 4-bit signal of said number A; a second adder over GF(2 4 ) for receiving and adding said higher-order 4-bit signal and lower-order 4-bit signal of said number B; a coefficient multiplier for producing a product of the output signals of said first multiplier over GF(2 4 ) and a predetermined coefficient; a third adder over GF(2 4 ) for adding the output signals of said coefficient multiplier and said second multiplier over GF(2 4 ); a third multiplier over GF(2 4 ) for adding the output signals of said first and second adder over GF(2 4 ); and a fourth adder over GF(2 4 ) for adding the output signals of said second and third multipliers over GF(2 4 ).

Claim 3

An operational apparatus over GF(2 4 ) using GF(2 4 ) as claimed in claim 1, wherein said multiplier over GF(2 4 ) satisfying the equations z.sub.0 =x.sub.0 y.sub.0 +x.sub.3 y.sub.1 +(x.sub.2 +x.sub.3)y.sub.2 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.3 z.sub.1 =x.sub.1 y.sub.0 +x.sub.0 y.sub.1 +x.sub.3 y.sub.2 +(x.sub.2 +x.sub.3)y.sub.3 z.sub.2 =x.sub.2 y.sub.0 +x.sub.1 y.sub.1 +x.sub.0 y.sub.2 +x.sub.3 y.sub.3 z.sub.3 =x.sub.3 y.sub.0 +(x.sub.2 +y.sub.3)y.sub.1 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.2 +(x.sub.0 +x.sub.1 +x.sub.3)y.sub.3 for performing the operation of z=xy.

Claim 4

An operational apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 1, wherein said inversion circuit over GF(2 4 ) satisfying the equations I.sub.0 =a.sub.0 a.sub.1 +a.sub.0 a.sub.2 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 I.sub.1 =a.sub.0 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 +a.sub.0 a.sub.2 a.sub.3 I.sub.2 =a.sub.1 a.sub.2 +a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 a.sub.3 I.sub.3 =a.sub.1 a.sub.2 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.2 a.sub.3 for performing the operation I=1/A, wherein a 0 , a 1 , a 2 ,a 3 are elements of A.

Claim 5

An operation apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 1, wherein said square and coefficient multiplier over GF(2 4 ) satisfying the equations c.sub.0 =a.sub.2 +a.sub.3 c.sub.1 =a.sub.0 +a.sub.2 +a.sub.3 c.sub.0 =a.sub.3 c.sub.3 =a.sub.1 +a.sub.2 for performing the operation for obtaining a result C by multiplying A 2 by said coefficient wherein a 0 , a 1 , a 2 , a 3 are elements of A; and wherein c 0 , c 1 and c 3 are elements of C.

Claim 6

An operation apparatus of GF(2 8 ) using GF(2 4 ) as claimed in claim 1, wherein said coefficient multiplier over GF(2 4 ) satisfying the equations d.sub.0 =a.sub.3 d.sub.1 =a.sub.0 d.sub.2 =a.sub.1 d.sub.3 =a.sub.2 +a.sub.3 to obtain a result D, wherein a 0 , a 1 , a 2 , a 3 are elements of A, and wherein d 0 , d 1 , d 2 , d 3 are elements of D.

Claim 7

An operational apparatus over Galois Field GF(2 8 ) using subfield Galois Field GF(2 4 ) in which a primitive polynomial equation of GF(2 8 ) is P(x)=x 8 +x 4 +x 3 +x 2 +1 and a primitive polynomial equation of GF(2 4 ) is P(x)=x 4 +x 3 +1 comprising: converting means satisfying the equations z.sub.0 =b.sub.0 +b.sub.1 +b.sub.5 z.sub.1 =b.sub.1 +b.sub.3 +b.sub.5 z.sub.2 =b.sub.2 +b.sub.3 +b.sub.6 z.sub.3 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.6 z.sub.4 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.5 +b.sub.6 +b.sub.7 z.sub.5 =b.sub.2 +b.sub.5 +b.sub.6 z.sub.6 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.4 +b.sub.5 +b.sub.6 z.sub.7 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.5 for converting elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ) and representing digital information, into elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ); operational means for receiving said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 of said converting means and performing a mathematical operation in GF(2 4 ) on said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 ; and reversion means satisfying the equations b.sub.0 =z.sub.0 +z.sub.1 +z.sub.2 +z.sub.6 +z.sub.7 b.sub.1 =z.sub.1 +z.sub.2 +z.sub.5 b.sub.2 =z.sub.3 +z.sub.5 +z.sub.7 b.sub.3 =z.sub.2 +z.sub.6 +z.sub.7 b.sub.4 =z.sub.1 +z.sub.7 b.sub.5 =z.sub.5 +z.sub.6 +z.sub.7 b.sub.6 =z.sub.3 +z.sub.5 +z.sub.6 b.sub.7 =z.sub.1 +z.sub.4 +z.sub.6 +z.sub.7 for reverting said operated elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ) into operated elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ); wherein said operational means comprises: a first adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of a number A through said converting means; a first multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal of number A and the output signal of said first adder over GF(2 4 ); a square and coefficient multiplier for squaring and producing the product of the coefficients of said higher-order 4-bit signal of said number A; a second adder over GF(2 4 ) for adding the output signals of said first multiplier over GF(2 4 ) and said square and coefficient multiplier; an inversion circuit over GF(2 4 ) for inverting the output signal of said second adder over GF(2 4 ); a second multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and the output signal of said inversion circuit over GF(2 4 ); and a third multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal of said number A and the output signal of said inversion circuit over GF(2 4 ).

Claim 8

An operational apparatus over Galois Field GF(2 8 ) using subfield Galois Field GF(2 4 ) in which a primitive polynomial equation of GF(2 8 ) is P(x)=x 8 +x 4 +x 3 +x 2 +1 and a primitive polynomial equation of GF(2 4 ) is P(x)=x 4 +x 3 +1 comprising: converting means satisfying the equations z.sub.0 =b.sub.0 +b.sub.1 +b.sub.5 z.sub.1 =b.sub.1 +b.sub.3 +b.sub.5 z.sub.2 =b.sub.2 +b.sub.3 +b.sub.6 z.sub.3 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.6 z.sub.4 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.5 +b.sub.6 +b.sub.7 z.sub.5 =b.sub.2 +b.sub.5 +b.sub.6 z.sub.6 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.4 +b.sub.5 +b.sub.6 z.sub.7 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.5 for converting elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ) and representing digital information, into elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ); operational means for receiving said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 of said converting means and performing a mathematical operation in GF(2 4 ) on said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 ; and reversion means satisfying the equations b.sub.0 =z.sub.0 +z.sub.1 +z.sub.2 +z.sub.6 +z.sub.7 b.sub.1 =z.sub.1 +z.sub.2 +z.sub.5 b.sub.2 =z.sub.3 +z.sub.5 +z.sub.7 b.sub.3 =z.sub.2 +z.sub.6 +z.sub.7 b.sub.4 =z.sub.1 +z.sub.7 b.sub.5 =z.sub.5 +z.sub.6 +z.sub.7 b.sub.6 =z.sub.3 +z.sub.5 +z.sub.6 b.sub.7 =z.sub.1 +z.sub.4 +z.sub.6 +z.sub.7 for reverting said operated elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ) into operated elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ); wherein said operational means comprises: a first adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of a number A through said converting means; a first multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal of number A and the output signal of said first adder over GF(2 4 ); a square and coefficient multiplier for squaring and producing the product of the coefficients of said higher-order 4-bit signal of said number A; a second adder over GF(2 4 ) for adding the output signals of said first multiplier over GF(2 4 ) and said square and coefficient multiplier; an inversion circuit over GF(2 4 ) for inverting the output signal of said second adder over GF(2 4 ); a second multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and the output signal of said inversion circuit over GF(2 4 ); and a third multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal of said number A and the output signal of said inversion circuit over GF(2 4 ).

Claim 9

An operational apparatus over GF(2 4 ) using GF(2 4 ) as claimed in claim 6, wherein said multiplier over GF(2 4 ) satisfying the equations z.sub.0 =x.sub.0 y.sub.0 +x.sub.3 y.sub.1 +(x.sub.2 +x.sub.3)y.sub.2 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.3 z.sub.1 =x.sub.1 y.sub.0 +x.sub.0 y.sub.1 +x.sub.3 y.sub.2 +(x.sub.2 +x.sub.3)y.sub.3 z.sub.2 =x.sub.2 y.sub.0 +x.sub.1 y.sub.1 +x.sub.0 y.sub.2 +x.sub.3 y.sub.3 z.sub.3 =x.sub.3 y.sub.0 +(x.sub.2 +y.sub.3)y.sub.1 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.2 +(x.sub.0 +x.sub.1 +x.sub.3)y.sub.3 for performing the operation of z=xy.

Claim 10

An operational apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 6, wherein said inversion circuit over GF(2 4 ) satisfying the equations I.sub.0 =a.sub.0 a.sub.1 +a.sub.0 a.sub.2 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 I.sub.1 =a.sub.0 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 +a.sub.0 a.sub.2 a.sub.3 I.sub.2 =a.sub.1 a.sub.2 +a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 a.sub.3 I.sub.3 =a.sub.1 a.sub.2 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.2 a.sub.3 for performing the operation I=1/A, wherein a 0 , a 1 , a 2 ,a 3 are elements of A.

Claim 11

An operation apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 6, wherein said square and coefficient multiplier over GF(2 4 ) satisfying the equations c.sub.0 =a.sub.2 +a.sub.3 c.sub.1 =a.sub.0 +a.sub.2 +a.sub.3 c.sub.0 =a.sub.3 c.sub.3 =a.sub.1 +a.sub.2 for performing the operation for obtaining a result C by multiplying A 2 by said coefficient wherein a 0 , a 1 , a 2 , a 3 are elements of A; and wherein c 0 , c 1 and c 3 are elements of C.

Claim 12

An operation apparatus of GF(2 8 ) using GF(2 4 ) as claimed in claim 6, wherein said coefficient multiplier over GF(2 4 ) satisfying the equations d.sub.0 =a.sub.3 d.sub.1 =a.sub.0 d.sub.2 =a.sub.1 d.sub.3 =a.sub.2 +a.sub.3 to obtain a result D, wherein a 0 , a 1 , a 2 , a 3 are elements of A, and wherein d 0 , d 1 , d 2 , d 3 are elements of D.

Claim 13

An operational apparatus over Galois Field GF(2 8 ) using subfield Galois Field GF(2 4 ) in which a primitive polynomial equation of GF(2 8 ) is P(x)=x 8 +x 4 +x 3 +x 2 +1 and a primitive polynomial equation of GF(2 4 ) is P(x)=x 4 +x 3 +1 comprising: converting means satisfying the equations z.sub.0 =b.sub.0 +b.sub.1 +b.sub.5 z.sub.1 =b.sub.1 +b.sub.3 +b.sub.5 z.sub.2 =b.sub.2 +b.sub.3 +b.sub.6 z.sub.3 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.6 z.sub.4 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.5 +b.sub.6 +b.sub.7 z.sub.5 =b.sub.2 +b.sub.5 +b.sub.6 z.sub.6 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.4 +b.sub.5 +b.sub.6 z.sub.7 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.5 for converting elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ) and representing digital information, into elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ); operational means for receiving said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 of said converting means and performing a mathematical operation in GF(2 4 ) on said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 ; and reversion means satisfying the equations b.sub.0 =z.sub.0 +z.sub.1 +z.sub.2 +z.sub.6 +z.sub.7 b.sub.1 =z.sub.1 +z.sub.2 +z.sub.5 b.sub.2 =z.sub.3 +z.sub.5 +z.sub.7 b.sub.3 =z.sub.2 +z.sub.6 +z.sub.7 b.sub.4 =z.sub.1 +z.sub.7 b.sub.5 =z.sub.5 +z.sub.6 +z.sub.7 b.sub.6 =z.sub.3 +z.sub.5 +z.sub.6 b.sub.7 =z.sub.1 +z.sub.4 +z.sub.6 +z.sub.7 for reverting said operated elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ) into operated elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ); said operational means for performing the operation of B/A, where A and B are numbers in GF(2 8 ), comprising: a first adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of said number A; a second adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of said number B; a first multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and said lower-order 4-bit signal of said number B; a second multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and said lower-order 4-bit signal of said number B; a third multiplier over GF(2 4 ) for producing the product of the output signal of said first adder over GF(2 4 ) and said lower-order 4-bit signal of said number B; a fourth multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal and the output signal of said fourth multiplier over GF(2 4 ); a square and coefficient multiplier for squaring and producing a product of the coefficients of said lower-order 4-bit signal of said number B; a third adder over GF(2 4 ) for adding the output signals of said fourth multiplier over GF(2 4 ) and said square and coefficient multiplier; a coefficient multiplier for producing a product of the output signals of said first multiplier over GF(2 4 ) and a predetermined coefficient; a fourth adder over GF(2 4 ) for adding the output signals of said coefficient multiplier and second adder over GF(2 4 ); a fifth adder over GF(2 4 ) for adding the output signals of said second and third multipliers over GF(2 4 ); an inversion circuit for inverting the output signal of said third adder over GF(2 4 ); a fifth multiplier over GF(2 4 ) for producing the product of the output signals of said fourth adder and said inversion circuit over GF(2 4 ); and a sixth multiplier over GF(2 4 ) for producing the product of the output signals of said fifth adder over GF(2 4 ) and said inversion circuit.

Claim 14

An operational apparatus over Galois Field GF(2 8 ) using subfield Galois Field GF(2 4 ) in which a primitive polynomial equation of GF(2 8 ) is P(x)=x 8 +x 4 +x 3 +x 2 +1 and a primitive polynomial equation of GF(2 4 ) is P(x)=x 4 +x 3 +1 comprising: converting means satisfying the equations z.sub.0 =b.sub.0 +b.sub.1 +b.sub.5 z.sub.1 =b.sub.1 +b.sub.3 +b.sub.5 z.sub.2 =b.sub.2 +b.sub.3 +b.sub.6 z.sub.3 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.6 z.sub.4 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.5 +b.sub.6 +b.sub.7 z.sub.5 =b.sub.2 +b.sub.5 +b.sub.6 z.sub.6 =b.sub.1 +b.sub.2 +b.sub.3 +b.sub.4 +b.sub.5 +b.sub.6 z.sub.7 =b.sub.1 +b.sub.3 +b.sub.4 +b.sub.5 for converting elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ) and representing digital information, into elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ); operational means for receiving said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 of said converting means and performing a mathematical operation in GF(2 4 ) on said elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 ; and reversion means satisfying the equations b.sub.0 =z.sub.0 +z.sub.1 +z.sub.2 +z.sub.6 +z.sub.7 b.sub.1 =z.sub.1 +z.sub.2 +z.sub.5 b.sub.2 =z.sub.3 +z.sub.5 +z.sub.7 b.sub.3 =z.sub.2 +z.sub.6 +z.sub.7 b.sub.4 =z.sub.1 +z.sub.7 b.sub.5 =z.sub.5 +z.sub.6 +z.sub.7 b.sub.6 =z.sub.3 +z.sub.5 +z.sub.6 b.sub.7 =z.sub.1 +z.sub.4 +z.sub.6 +z.sub.7 for reverting said operated elements z 0 , z 1 , z 2 , z 3 , z 4 , z 5 , z 6 , and z 7 represented by a basis over GF(2 4 ) into operated elements b 0 , b 1 , b 2 , b 3 , b 4 , b 5 , b 6 , and b 7 represented by a basis over GF(2 8 ); said operational means for performing the operation of B/A, where A and B are numbers in GF(2 8 ), comprising: a first adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of said number A; a second adder over GF(2 4 ) for adding a higher-order 4-bit signal and a lower-order 4-bit signal of said number B; a first multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and said lower-order 4-bit signal of said number B; a second multiplier over GF(2 4 ) for producing the product of said higher-order 4-bit signal of said number A and said lower-order 4-bit signal of said number B; a third multiplier over GF(2 4 ) for producing the product of the output signal of said first adder over GF(2 4 ) and said lower-order 4-bit signal of said number B; a fourth multiplier over GF(2 4 ) for producing the product of said lower-order 4-bit signal and the output signal of said fourth multiplier over GF(2 4 ); a square and coefficient multiplier for squaring and producing a product of the coefficients of said lower-order 4-bit signal of said number B; a third adder over GF(2 4 ) for adding the output signals of said fourth multiplier over GF(2 4 ) and said square and coefficient multiplier; a coefficient multiplier for producing a product of the output signals of said first multiplier over GF(2 4 ) and a predetermined coefficient; a fourth adder over GF(2 4 ) for adding the output signals of said coefficient multiplier and second adder over GF(2 4 ); a fifth adder over GF(2 4 ) for adding the output signals of said second and third multipliers over GF(2 4 ); an inversion circuit for inverting the output signal of said third adder over GF(2 4 ); a fifth multiplier over GF(2 4 ) for producing the product of the output signals of said fourth adder and said inversion circuit over GF(2 4 ); and a sixth multiplier over GF(2 4 ) for producing the product of the output signals of said fifth adder over GF(2 4 ) and said inversion circuit.

Claim 15

An operational apparatus over GF(2 4 ) using GF(2 4 ) as claimed in claim 11, wherein said multiplier over GF(2 4 ) satisfying the equations z.sub.0 =x.sub.0 y.sub.0 +x.sub.3 y.sub.1 +(x.sub.2 +x.sub.3)y.sub.2 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.3 z.sub.1 =x.sub.1 y.sub.0 +x.sub.0 y.sub.1 +x.sub.3 y.sub.2 +(x.sub.2 +x.sub.3)y.sub.3 z.sub.2 =x.sub.2 y.sub.0 +x.sub.1 y.sub.1 +x.sub.0 y.sub.2 +x.sub.3 y.sub.3 z.sub.3 =x.sub.3 y.sub.0 +(x.sub.2 +y.sub.3)y.sub.1 +(x.sub.1 +x.sub.2 +x.sub.3)y.sub.2 +(x.sub.0 +x.sub.1 +x.sub.3)y.sub.3 for performing the operation of z=xy.

Claim 16

An operational apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 11, wherein said inversion circuit over GF(2 4 ) satisfying the equations I.sub.0 =a.sub.0 a.sub.1 +a.sub.0 a.sub.2 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 I.sub.1 =a.sub.0 a.sub.3 +a.sub.1 a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 +a.sub.0 a.sub.2 a.sub.3 I.sub.2 =a.sub.1 a.sub.2 +a.sub.2 a.sub.3 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.1 a.sub.2 a.sub.3 I.sub.3 =a.sub.1 a.sub.2 +a.sub.0 a.sub.1 a.sub.3 +a.sub.0 a.sub.0 a.sub.2 a.sub.3 for performing the operation I=1/A, wherein a 0 , a 1 , a 2 ,a 3 are elements of A.

Claim 17

An operation apparatus over GF(2 8 ) using GF(2 4 ) as claimed in claim 11, wherein said square and coefficient multiplier over GF(2 4 ) satisfying the equations c.sub.0 =a.sub.2 +a.sub.3 c.sub.1 =a.sub.0 +a.sub.2 +a.sub.3 c.sub.0 =a.sub.3 c.sub.3 =a.sub.1 +a.sub.2 for performing the operation for obtaining a result C by multiplying A 2 by said coefficient wherein a 0 , a 1 , a 2 , a 3 are elements of A; and wherein c 0 , c 1 and c 3 are elements of C.

Claim 18

An operation apparatus of GF(2 8 ) using GF(2 4 ) as claimed in claim 11, wherein said coefficient multiplier over GF(2 4 ) satisfying the equations d.sub.0 =a.sub.3 d.sub.1 =a.sub.0 d.sub.2 =a.sub.1 d.sub.3 =a.sub.2 +a.sub.3 to obtain a result D, wherein a 0 , a 1 , a 2 , a 3 are elements of A, and wherein d 0 , d 1 , d 2 , d 3 are elements of D.